R1QEA4436RBG-19IA0 datasheet(11/31 Pages) RENESAS

Part #	R1QEA4436RBG-19IA0

Description	144-Mbit DDR?줚I SRAM 2-word Burst Architecture ( 2.5 Cycle Read latency ) with ODT

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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11 / 31 page

R1QEA4436RBG, R1QEA4418RBG

Datasheet

R10DS0142EJ0200 Rev.2.00

Page 11 of 30

Aug 01, 2014

Output

Buffer

SRAM with ODT

2

× R

THEV

2

× R

THEV

V

DDQ

Other LSI

Input

Buffer

V

SS

ZQ

V

SS

RQ

Thevenin termination

ODT pin

Pin name

ODT On/Off

DQ0 to DQn

Off: First Read Command

+ Read Latency

- 0.5 cycle

On: Last Read Command

+ Read Latency

+ BL/2 cycle + 0.5 cycle

(See below timing chart)

/BWx

Always On

K, /K

Always On

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R1QEA4436RBG-19IA0 Datasheet(PDF) 11 Page - Renesas Technology Corp

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