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R1QEA4436RBG-19IB0 Datasheet(PDF) 10 Page - Renesas Technology Corp |
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R1QEA4436RBG-19IB0 Datasheet(HTML) 10 Page - Renesas Technology Corp |
10 / 31 page R1QEA4436RBG, R1QEA4418RBG Datasheet R10DS0142EJ0200 Rev.2.00 Page 10 of 30 Aug 01, 2014 Programmable Output Impedance 1. Output buffer impedance can be programmed by terminating the ZQ ball to VSS through a precision resistor (RQ). The value of RQ is five times the output impedance desired. The allowable range of RQ to guarantee impedance matching with a tolerance of 15% is between 175 Ω and 350 Ω. The total external capacitance of ZQ ball must be less than 7.5 pF. QVLD (Valid data indicator) 1. QVLD is provided on the QDR-II+ and DDR-II+ to simplify data capture on high speed systems. The Q Valid indicates valid output data. QVLD is activated half cycle before the read data for the receiver to be ready for capturing the data. QVLD is inactivated half cycle before the read finish for the receiver to stop capturing the data. QVLD is edge aligned with CQ and /CQ. ODT (On Die Termination) 1. To reduce reflection which produces noise and lowers signal quality, the signals should be terminated, especially at high frequency. Renesas offers ODT on the input signals to QDR-II+ and DDR-II+ family of devices. 2. The ODT termination values tracks the value of RQ. The ODT range is selected by ODT control input. 3. In DDR-II+ devices having common I/O bus, ODT is automatically enabled when the device inputs data and disabled when the device outputs data. 4. There is no difference in AC timing characteristics between the SRAMs with ODT and SRAMs without ODT. 5. There is no increase in the IDD of SRAMs with ODT, however, there is an increase in the IDDQ (current consumption from the I/O voltage supply) with ODT. ODT range ODT control pin Thevenin equivalent resistance (RTHEV) Unit Notes Low 0.3 x RQ Ω 1,3 High 0.6 x RQ Ω 2 Floating 0.6 x RQ Ω 2 Notes: 1. Allowable range of RQ to guarantee impedance matching a tolerance of ± 20 % is 175 Ω ≤ RQ ≤ 350Ω. 2. Allowable range of RQ to guarantee impedance matching a tolerance of ± 20 % is 175 Ω ≤ RQ ≤ 250 Ω. 3. ODT control pin is connected to VDDQ through 3.5 kΩ. Therefore it is recommended to connect it to VSS through less than 100 Ω to make it low. |
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