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ISL6152CB Datasheet(PDF) 8 Page - Intersil Corporation |
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ISL6152CB Datasheet(HTML) 8 Page - Intersil Corporation |
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8 / 23 page  8 AC TIMING OV High to GATE Low tPHLOV Figures 2A, 3A 0.6 1.6 3.0 µs OV Low to GATE High tPLHOV Figures 2A, 3A 1.0 7.8 12.0 µs UV Low to GATE Low tPHLUV Figures 2A, 3B 0.6 1.3 3.0 µs UV High to GATE High tPLHUV Figures 2A, 3B 1.0 8.4 12.0 µs DIS Low to GATE Low tPHLDIS Figure 2A, 7 0.6 µs DIS High to GATE High tPLHDIS Figure 2A, 7 2.5 µs GATE Low (Over-Current) to FAULT Low tPHLGF Figure 2A, 8 0.5 µs ISOUT Rise Time tR Figure 2A, 12 1.2 µs ISOUT Fall Time tF Figure 2A, 12 4.0 µs SENSE High to GATE Low tPHLSENSE Figures 2A, 9 1 3 µs Current Limit to GATE Low tPHLCB Figures 2B, 11, Effective Capacitance During Test = 2550pF 1200 µs Hard Fault to GATE Low (200mV comparator) Typical GATE shutdown based on application ckt. Guaranteed by design. tPHLHF Figures 10, 20, 33 10.0 µs ISL6142 (L Version) DRAIN Low to PWRGD Low (Active) tPHLDL Figures 2A, 4A 0.1 3.1 5.0 µs DRAIN High to PWRGD High (Inactive) tPLHDH Figure 2A, 6A 0.2 µs GATE High to PWRGD Low (Active) tPHLGH Figures 2A, 5A 1.0 µs ISL6152 (H Version) DRAIN Low to (PWRGD-DRAIN) High (Active) tPLHDL Figures 2A, 4B 0.1 0.2 5.0 µs DRAIN High to (PWRGD -DRAIN) Low (Inactive) tPHLDH Figure 2A, 6B 0.5 µs GATE High to (PWRGD-DRAIN) High (Active) tPLHGH Figures 2A, 5B 0.4 µs Electrical Specifications VDD = +48V, VEE = +0V Unless Otherwise Specified. All tests are over the full temperature range; either Commercial (0oC to 70oC) or Industrial (-40oC to 85oC). Typical specs are at 25oC. (Continued) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS ISL6142, ISL6152 |
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