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ISL6244HRZ Datasheet(PDF) 1 Page - Intersil Corporation

Part # ISL6244HRZ
Description  Multi-Phase PWM Controller
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL6244HRZ Datasheet(HTML) 1 Page - Intersil Corporation

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1
®
FN9106.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004 All Rights Reserved. Dynamic VID™ is a trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
ISL6244
Multi-Phase PWM Controller
The ISL6244 provides core-voltage regulation by driving 2 to
4 interleaved synchronous-rectified buck-converter channels
in parallel. Interleaving the channel timing results in
increased ripple frequency which reduces input and output
ripple currents. The reduction in ripple results in lower
component cost, reduced dissipation, and a smaller
implementation area.
The ISL6244 uses cost and space-saving rDS(ON) sensing
for channel current balance, active voltage positioning, and
over-current protection. Output voltage is monitored by an
internal differential remote sense amplifier. A high-bandwidth
error amplifier drives the output voltage to match the
programmed 5-bit DAC reference voltage. The resulting
compensation signal guides the creation of pulse width
modulated (PWM) signals to control companion Intersil
MOSFET drivers. The OFS pin allows direct offset of the
DAC voltage from 0V to 100mV using a single external
resistor. The entire system is trimmed to ensure a system
accuracy of ±1%.
Outstanding features of this controller IC include
Dynamic VIDTM technology allowing seamless on-the-fly VID
changing without the need of any external components.
Battery “feed-forward” is provided to allow for traditional
control schemes over total input voltage variation. Output
voltage “droop” or active voltage positioning is optional.
When employed, it allows the reduction in size and cost of
the output capacitors required to support load transients. A
threshold-sensitive enable input allows the use of an
external resistor divider for start-up coordination with Intersil
MOSFET drivers or any other devices powered from a
separate supply.
Superior over-voltage protection is achieved by gating on the
lower MOSFET of all phases to reduce the output voltage.
Under-voltage conditions are detected, but PWM operation
is not disrupted. Over-current conditions cause a hiccup-
mode response as the controller repeatedly tries to restart.
After a set number of failed startup attempts, the controller
latches off. A power good logic signal indicates when the
converter output is between the UV and OV thresholds.
Features
• Multi-Phase Power Conversion
- 2, 3 or 4 Phase Operation
• Active Channel Current Balancing
• Precision rDS(ON) Current Sharing
- Lossless
-Low Cost
• Precision CORE Voltage Regulation
- Differential Remote Output Voltage Sensing
- Programmable Reference Offset
- ±1% System Accuracy
• Microprocessor Voltage Identification Input
- 5-Bit VID Input
- 0.800V to 1.550V in 25mV Steps
- Dynamic VID Technology
• Programmable Droop Voltage
• Excellent Dynamic Response
- Combined Input Voltage Feed-Forward and Pulse-by-
Pulse Average Current Mode
• Over Current Protection
• Digital Soft Start
• Threshold Sensitive Enable Input
• High Ripple Frequency (160kHz to 4MHz)
• QFN Package:
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Package Outline
- Near Chip Scale Package footprint, which improves PCB
efficiency and has a thinner profile
• Pb-Free Available (RoHS Compliant)
Applications
• AMD Hammer Family Processor Voltage Regulator
• Low Output Voltage, High Current DC-DC Converters
• Voltage Regulator Modules
Data Sheet
December 28, 2004


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