10

FN9062.2

April 13, 2004

During sleep-to-active state transitions from conditions

transition, or simple power-up sequence directly into active

state), the circuit goes through a quasi soft-start, the

the N-Channel MOSFET connected between it and the 5V

present when the main ATX outputs are turned on, at time

capacitors charge up through the body diode of Q4 (see

Typical Application). At time T1, all main ATX outputs

exceed the ISL6504/A’s undervoltage thresholds, and the

internal 25ms (typical) timer is initiated. At T2, the time-out

initiates a soft-start, and the 1.2V voltage ID output is

ramped-up, reaching regulation limits at time T3.

Simultaneous with the beginning of this ramp-up, at time T2,

the DLA pin is released, allowing the pull-up resistor to turn

Shortly after time T3, as the SS voltage reaches 2.75V, the

soft-start capacitor is quickly discharged down to

approximately 2.45V, where it remains until a valid sleep

state request is received from the system.

Fault Protection

All the outputs are monitored against undervoltage events. A

severe overcurrent caused by a failed load on any of the

outputs, would, in turn, cause that specific output to

suddenly drop. If any of the output voltages drops below

80% (typical) of their set value, such event is reported by

having the FAULT pin pulled to 5V. Additionally, exceeding

the maximum current rating of an integrated regulator

(output with pass regulator on chip) can lead to output

voltage drooping; if excessive, this droop can ultimately trip

the undervoltage detector and send a FAULT signal to the

computer system.

A FAULT condition occurring on an output when controlled

through an external pass transistor will only set off the

FAULT flag, and it will not shut off or latch off any part of the

circuit. A FAULT condition occurring on an output controlled

through an internal pass transistor, will set off the FAULT

flag, and it will shut off the respective faulting regulator only.

If shutdown or latch off of the entire circuit is desired in case

of a fault, regardless of the cause, this can be achieved by

externally pulling or latching the SS pin low. Pulling the SS

pin low will also force the FAULT pin to go low and reset any

internally latched-off output.

Special consideration is given to the initial start-up

subject to an undervoltage event before the end of the

second soft-start ramp, then the FAULT output goes high

and the entire IC latches off. Latch-off condition can be reset

times are handled according to the description found in the

second paragraph under the current heading.

Another condition that could set off the FAULT flag is chip

overtemperature. If the ISL6504/A reaches an internal

chip continues to operate until the temperature reaches

takes place. Operation resumes only after powering down

(assuming the cause of the fault has been removed; if not,

as it heats up again, it will repeat the FAULT cycle).

In ISL6504/A applications, loss of the active ATX output

active state operation causes the chip to switch to S5 sleep

state, in addition to reporting the input UV condition on the

FAULT pin. Exiting from this forced S5 state can only be

achieved by returning the faulting input voltage above its UV

bias voltage, or by bringing the SS pin at a potential lower

than 0.8V.

Application Guidelines

Soft-Start Interval

725mA, with newer models rated for 1.0A, and even 2.0A.

needs to provide sufficient current to charge up all the

applicable output capacitors and, simultaneously, provide

some amount of current to the output loads. Drawing

FIGURE 9. SOFT-START INTERVAL IN ACTIVE STATE

0V

0V

TIME

OUTPUT

(1V/DIV)

VOLTAGES

T1

T2

T3

T0

INPUT VOLTAGES

(2V/DIV)

+5VIN

+12VIN

+5VSB

VOUT1 (1.5VSB)

VOUT3 (3.3VDUAL/3.3VSB)

VOUT4 (5VDUAL)

DLA PIN

(2V/DIV)

+3.3VIN

VOUT2 (1.2VVID)

SOFT-START

(1V/DIV)

ISL6504, ISL6504A