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ISL6530CR-T Datasheet(PDF) 9 Page - Intersil Corporation |
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ISL6530CR-T Datasheet(HTML) 9 Page - Intersil Corporation |
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9 / 17 page  9 FN9052.2 November 15, 2004 One method that may be employed to bypass the internal VTT reference generation is to supply an external reference directly to the VREF_IN pin. When doing this the SENSE1 pin must remain unconnected. Caution must be exercised when using this method as the VTT regulator does not employ a soft-start of its own. A second method would be to overdrive the internal resistors. Figure 4 shows how to implement this method. The external resistors used to overdrive the internal resistors should be less than 2k Ω and have a tolerance of 1% or better. This method still supplies a buffer between the resistor network and any loading on the VREF pin. If there is no loading on the VREF pin, then no buffering is necessary and the reference voltage created by the resistor network can be tied directly to VREF. Converter Shutdown Pulling and holding the OCSET/SD pin below 0.8V will shutdown both regulators. During this state, PGOOD will be held LOW. Upon release of the OCSET/SD pin, the IC enters into a soft start cycle which brings both outputs back into regulation. Voltage Monitoring The ISL6530 offers a PGOOD signal that will communicate whether the regulation of both VDDQ and VTT are within ±15% of regulation, the V2_SD pin is held low and the bias voltage of the IC is above the POR level. If all the criteria above are true, the PGOOD pin will be at a high impedence level. When one or more of the criteria listed above are false, the PGOOD pin will be held low. Overcurrent Protection The overcurrent function protects the converter from a shorted output by using the upper MOSFET on-resistance, rDS(ON), of VDDQ to monitor the current. This method enhances the converter’s efficiency and reduces cost by eliminating a current sensing resistor. The over-current function cycles the soft-start function in a hiccup mode to provide fault protection. A resistor (ROCSET) programs the overcurrent trip level (see Figure 1). An internal 40 µA (typical) current sink develops a voltage across ROCSET that is referenced to VIN. When the voltage across the upper MOSFET of VDDQ (also referenced to VIN) exceeds the voltage across ROCSET , the overcurrent function initiates a soft-start sequence. Figure 5 illustrates the protection feature responding to an over current event on VDDQ. At time T0, an over current condition is sensed across the upper MOSFET of the VDDQ regulator. As a result, both regulators are quickly shutdown and the internal soft-start function begins producing soft- start ramps. The delay interval seen by the output is equivalent to three soft-start cycles. The fourth internal soft- start cycle initiates a normal soft-start ramp of the output, at time T1. Both outputs are brought back into regulation by time t2, as long as the overcurrent event has cleared. Had the cause of the overcurrent still been present after the delay interval, the overcurrent condition would be sensed and both regulators would be shut down again for another delay interval of three soft-start cycles. The resulting hiccup mode style of protection would continue to repeat indefinitely. The overcurrent function will trip at a peak inductor current (IPEAK) determined by: where IOCSET is the internal OCSET current source (40µA typical). The OC trip point varies mainly due to the MOSFET FIGURE 4. VTT REFERENCE OVERDRIVE VREF + - VREF_IN SENSE1 TO ERROR AMPLIFIER ISL6530 VDDQ RA RB FIGURE 5. OVERCURRENT PROTECTION RESPONSE 0V TIME VDDQ (2.5V) T1 T0 T2 VTT (1.25V) INTERNAL SOFT-START FUNCTION DELAY INTERVAL I PEAK I OCSET x ROCSET r DS ON () ----------------------------------------------------- = ISL6530 |
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