Datasheet

R2A20168NP/SA/SP

Page 2 of 9

R03DS0019EJ0200 Rev.2.00

Jul 03, 2013

Pin Description

Pin Arrangement

Pin No.

Symbol

Function

[QFN]

[TSSO

P

/SOP]

12

14

DI

Serial data input terminal.

( Input serial data with a 12-bit data length )

11

13

CLK

Serial clock input terminal

(Input signal from DI terminal is input to 12-bit shift register at rise of

serial clock.)

10

12

LD

Load terminal

(When High level is input to LD terminal, value in 12-bit shift register

is loaded into decoder and 8-bit latch.)

9

11

Do

Serial data output terminal

(Data is sequentially output from the MSB bit.)

13

15

Ao1

8-bit resolution D/A converter output terminals

(After power on, all channels are reset and DAC data 00h is output.)

16

2

Ao2

1

3

Ao3

2

4

Ao4

3

5

Ao5

4

6

Ao6

5

7

Ao7

8

10

Ao8

7

9

Vcc

Power supply terminal

14

16

GND

GND terminal

6

8

D/A converter upper reference voltage input terminal

15

1

D/A converter lower reference voltage input terminal

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

R2A20168NP (Top view)

R2A20168SA/SP (Top view)

12

11

10

9

1

2

3

4

Outline: PWQN0016KB-A [NP]

Outline: PTSP0016JB-A [SA]

PRSP0016DH-B [SP]

Ao3

Ao4

LD

DO

Ao5

Ao6

CLK

DI

Ao2

Ao3

GND

Ao1

DI

CLK

Ao4

Ao5

Ao6

Ao7

LD

DO

Ao8

Vcc