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ADV453 Datasheet(PDF) 8 Page - Analog Devices |
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ADV453 Datasheet(HTML) 8 Page - Analog Devices |
8 / 12 page ADV453 REV. B –8– Frame Buffer Interface The P0–P7, OL0 and OL1 inputs are used to address the color palette RAM and overlay registers, as shown in Table IV. These inputs are latched on the rising edge of CLOCK and address any of the 256 locations in the color palette RAM or the three overlay registers. The addressed location contains 24 bits of color (8 bits of red, 8 bits of green and 8 bits of blue) informa- tion. This data is transferred to the three DACs and is then con- verted to an analog output (IOR, IOG and IOB), these outputs then control the red, green and blue electron guns in the monitor. The SYNC and BLANK inputs are also latched on the rising edge of CLOCK. This is to maintain synchronization with the color data. Table IV. Pixel and Overlay Control Truth Table OL1 OL0 P0–P7 Addressed by Frame Buffer 0 0 00H Color Palette RAM Location 00H 0 0 01H Color Palette RAM Location 01H •• • • •• • • 0 0 FFH Color Palette RAM Location FFH 0 1 XXH Overlay Color 1 1 0 XXH Overlay Color 2 1 1 XXH Overlay Color 3 Analog Interface The ADV453 has three analog outputs, corresponding to the red, green and blue video signals. A fourth analog output (ISYNC) can be used if it is required to encode video synchroni- zation information onto the green signal. In this case, ISYNC is connected to IOG as shown in Figure 3. If it is not required to encode sync information onto the green signal (as would be the case if a separate synchronization circuit was used), ISYNC should be connected to GND and the digital SYNC input pin should be tied low. Figure 3. Encoding SYNC onto Green Signal The red, green and blue analog outputs of the ADV453 are high impedance current sources. Each one of these three RGB cur- rent outputs is capable of directly driving a 37.5 Ω load, such as a doubly-terminated 75 Ω coaxial cable. Figure 4a shows the re- quired configuration for each of the three RGB outputs con- nected into a doubly-terminated 75 Ω load. This arrangement will develop RS-343A video output voltage levels across a 75 Ω monitor. A simple method of driving RS-170 video levels into a 75 Ω monitor is shown in Figure 4b. The output current levels of the DACs remain unchanged, but the source termination re- sistance, ZS, on each of the three DACs is increased from 75 Ω to 150 Ω. Figure 4a. Recommended Analog Output Termination for RS-343A Figure 4b. Recommended Analog Output Termination for RS-170 More detailed information regarding load terminations for vari- ous output configurations, including RS-343A and RS-170, is available in an application note entitled “Video Formats & Required Load Terminations,” available from Analog Devices. Figure 5 shows the video waveforms associated with the three RGB outputs, driving the doubly terminated 75 Ω load of Fig- ure 4a. As well as the gray scale levels, black level to white level, the diagram also shows the contributions of SYNC and BLANK. These control inputs add appropriately weighted currents to the analog outputs producing the specific output level requirements for video applications. Table V details how the SYNC and BLANK inputs modify the output levels. |
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