 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
IR2117 Datasheet(PDF) 5 Page - International Rectifier |
|
||||||||||||||||||||||||||||||
IR2117 Datasheet(HTML) 5 Page - International Rectifier |
|
|
5 / 7 page  IR2117 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-79 Thickness of Gate Oxide 800Å Connections Material Poly Silicon First Width 4 µm Layer Spacing 6 µm Thickness 5000Å Material Al - Si (Si: 1.0% ±0.1%) Second Width 6 µm Layer Spacing 9 µm Thickness 20,000Å Contact Hole Dimension 8 µm X 8 µm Insulation Layer Material PSG (SiO2) Thickness 1.5 µm Passivation Material PSG (SiO2) Thickness 1.5 µm Method of Saw Full Cut Method of Die Bond Ablebond 84 - 1 Wire Bond Method Thermo Sonic Material Au (1.0 mil / 1.3 mil) Leadframe Material Cu Die Area Ag Lead Plating Pb : Sn (37 : 63) Package Types 8 Lead PDIP / SO-8 Materials EME6300 / MP150 / MP190 Remarks: Device Information Process & Design Rule HVDCMOS 4.0 µm Transistor Count 114 Die Size 70 X 77 X 26 (mil) Die Outline To Order Next Data Sheet Index Previous Datasheet |
Similar Part No. - IR2117 |
|
Similar Description - IR2117 |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
