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KSMD8P10 Datasheet(PDF) 1 Page - Kersemi Electronic Co., Ltd. |
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KSMD8P10 Datasheet(HTML) 1 Page - Kersemi Electronic Co., Ltd. |
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1 / 6 page  KSMD8P10TM_F085 100V P-Channel MOSFET General Description These P-Channel enhancement mode power field effect transistors are produced using Kersemi proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as audio amplifier, high efficiency switching DC/DC converters, and DC motor control. Features • -6.6A, -100V, RDS(on) = 0.53Ω @VGS = -10 V • Low gate charge ( typical 12 nC) • Low Crss ( typical 30 pF) • Fast switching • 100% avalanche tested • Improved dv/dt capability Absolute Maximum Ratings TC = 25°C unless otherwise noted Thermal Characteristics Symbol Parameter Ratings Units VDSS Drain-Source Voltage -100 V ID Drain Current - Continuous (TC = 25°C) -6.6 A - Continuous (TC = 100°C) -4.2 A IDM Drain Current - Pulsed (Note 1) -26.4 A VGSS Gate-Source Voltage ± 30 V EAS Single Pulsed Avalanche Energy (Note 2) 150 mJ IAR Avalanche Current (Note 1) -6.6 A EAR Repetitive Avalanche Energy (Note 1) 4.4 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) -6.0 V/ns PD Power Dissipation (TA = 25°C) * 2.5 W Power Dissipation (TC = 25°C) 44 W - Derate above 25°C 0.35 W/°C TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C TL Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 300 °C Symbol Parameter Typ Max Units RθJC Thermal Resistance, Junction-to-Case -- 2.84 °C/W RθJA Thermal Resistance, Junction-to-Ambient * -- 50 °C/W RθJA Thermal Resistance, Junction-to-Ambient -- 110 °C/W S D G • Qualified to AEC Q101 • RoHS Compliant TO-252 2014-7-3 1 www.kersemi.com |
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