UPD17068GF-E datasheet(5/341 Pages) NEC

Part #	UPD17068GF-E

Description	4-BIT SINGLE-CHIP MICROCONTROLLER CONTAINING IMAGE DISPLAY CONTROLLER AND PLL FREQUENCY SYNTHESIZER FOR DIGITAL TUNING SYSTEMS

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Manufacturer	NEC [NEC]

Direct Link	http://www.nec.com/

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5 / 341 page

5

µPD17068

VCO

PSC

EO

OSCIN

OSCOUT

HSYNC

VSYNC

RED

GREEN

BLUE

BLANK

I (POB2)

HSCNT (P0B3)

P0A0-P0A3

P0B0-P0B3

P0C0-P0C3

P0D0-P0D3

P1A0-P1A3

P1B0-P1B3

P1C0-P1C3

P1D0-P1D3

P2A0

P2B0-P2B3

P2C0-P2C3

P2D0-P2D3

XIN

XOUT

VDD

CE

RLSSTP/PIB2

GND0, GND1

Main

OSC

Reset

CPU

Peripheral

Port

PLL

OSC

circuit

IDC

Hsync

counter

RAM

1007

× 4 bits

VRAM

(672

× 4 bits)

System registers

RF

ALU

Instruction decoder

ROM

12032

× 16 bits

CROM

4086

× 24 bits

Program counter

Stack

12

× 14 bits

A/D

Converter

D/A

converter

OSC

Watch

timer

Timer 0

Timer 1

Basic

timer 0

Basic

timer 1

Basic

timer 2

Serial

interface 0

Serial

interface 1

Interrupt

ADC0

ADC1 (P0D0/XTOUT)

ADC2 (P0D1/XTIN)

ADC3 (P0D2)

ADC4 (P0D3)

ADC5 (P1C0)

ADC7 (P1C2)

|

PWM0 (P2C0)

PWM3 (P2C3)

PWM4 (P2B0)

PWM7 (P2B3)

PWM8 (P2A0)

|

XTIN (P0D1/ADC2)

XTOUT (P0D0/ADC1)

CKOUT (P1B1)

TMIN (P1B3)

SDA (P0A0)

SCL (P0A1)

SCK0 (P0A2)

SO0 (P0A3)

SI0 (P0B0)

SCK1 (P2D0)

SO1 (P2D1)

SI1 (P2D2)

INTNC

INT0

4

3

BLOCK DIAGRAM

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UPD17068GF-E Datasheet(PDF) 5 Page - NEC

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