Fig. 3 illustrates how the various blocks of fig. 2 relate with the electrical circuit, both external and inside

the L6561. For details on the internal circuit and its operation please refer to Ref. [1].

The loop gain of PFC preregulators must have a very low crossover frequency (fc) so as to maintain

As a rule of thumb, fc should not exceed 20-25 Hz at maximum mains voltage.

This allows to assume that the control action takes place on the peak amplitude (or, which is the same,

the RMS value) of the various quantities inside the loop.

The first step is to determine the transfer function of the power stage, G4(s), defined as:

G4

(s) =

=

⋅

where Vo is the DC output voltage, Io the DC output

rent.

Under the above assumption, the power stage can

be modeled as illustrated in fig. 4: a controlled cur-

rent source (with a shunt resistor Re) that drives the

output bulk capacitor Co and the load resistance Ro

(= Vo / Io). The zero due to the ESR associated with

Co is far beyond the crossover frequency thus it is

neglected.

The current source can be characterised with the fol-

lowing considerations: the low frequency component

of the boost diode current is found by averaging the

discharge portion of the inductor current (the white

triangles of fig. 5) over a given switching cycle.

The low frequency current, averaged over a mains

half-cycle yields the DC output current Io:

=

1

2

_________________

=

1

2

⋅

_________________________

=

√ 2

4

⋅

where D is the switch duty cycle,

θ is the in-

stantaneous phase angle of the mains volt-

The AC model illustrated in fig. 4 can be

found by calculating the total differential of

the above expression of Io. A few algebraic

manipulations would show that the shunt re-

sistor Re always equals the DC load resis-

tance Ro, thus it changes depending on the

power delivered by the system. Now it is

necessary to consider two separate cases.

If the load is purely resistive (or equivalent to

a resistor, like in the case of a lamp ballast

circuit), the AC load resistance equals Ro.

The parallel of this resistance with Re, com-

bined with the output bulk capacitor, gives

origin to a pole located at:

2

which is usually in the range of 1 to 5 Hz.

Co

Ro

Re

Io

Vo

Figure 4. Power stage model,G4(s)

Inductor current

peak envelope

Low frequency

Diode current

ON

OFF

SWITCH

Diode current

Switch current

Io

Figure 5. Boost PFC currents

AN1089 APPLICATION NOTE

3/12