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UPD4704G Datasheet(PDF) 5 Page - NEC |
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UPD4704G Datasheet(HTML) 5 Page - NEC |
5 / 16 page 5 µPD4704 UP/DOWN STB tSUDSTB1 tSUDSTB2 If STB changes from "H" to "L" and a reset is executed in this period, the latch is also reset. Post-count value latched Pre-count value latched Either pre- or post-count value latched UP/DOWN STB RESET tSUDSTB1 tDUDCD Fig. 2 Relation Between STB Timing and Counter Value Fig. 3 STB and RESET Timing (3) Carry & borrow outputs If the counter performs an up-count operation when the count value is 0FFH, an active-low pulse is output to the Carry output (the pulse width is virtually the same as the UP or DOWN pulse L period). Similarly, if the counter performs a down-count operation when the count value is 00H, an active-low pulse is output to the Borrow output. A Borrow pulse is also output if a down-count operation is performed while RESET is "H" (during a reset), and therefore, when a µPD4704 is added, a reset must be executed at the same time. |
Similar Part No. - UPD4704G |
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Similar Description - UPD4704G |
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