AN4150

Synchronous buck converter testing demonstration board

Doc ID 023526 Rev 1

11/20

For a planar structure, L is the gate electrode width while the pitch is the cell-to-cell

charge per area) links the Power MOSFET dynamic performance to the device geometry,

providing a good tool for a technology comparison:

Equation 3

Equation 4

Equation 3 is valid for a planar device, while 4 is valid for trench. For modern silicon

technology, the following considerations are valid:

Equation 5

L*<< 2 h

Equation 6

L < 2 h

So, merging Equation 3, 4, 5 and 6 and considering that (pitch)A > (pitch)B:

Equation 7

Equation 8

In other words, the intrinsic capacitive contribution of planar technology is lower than that of

trench. This is of basic importance when the system/application requires switching

performance improvement.

The specific capacitance difference between devices A and B shown in Figure 8 is reflected

into dissimilar gate charge curves: all the components of the gate charge are much larger for

dev.B (red curve).

Q

g

A

-------

∝

L

pitch

()

A

----------------------

Q

g

A

-------

∝

L2h

+

pitch

()

A

----------------------

*

Q

g

A

-------

⎝⎠

⎛⎞

planar

Q

g

A

-------

⎝⎠

⎛⎞

trench

<

C

xx

A

---------

⎝⎠

⎛⎞

planar

C

xx

A

---------

⎝⎠

⎛⎞

trench

<