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Visit www.macomtech.com for additional data sheets and product information.

M/A-COM Technology Solutions Inc. and its affiliates reserve the right to make

changes to the product(s) or information contained herein without notice.

6

Doubler and Power Amplifier

18.0-21.0/36.0-42.0 GHz

XX1001-QK

ADVANCED: Data Sheets contain information regarding a product M/A-COM Technology Solutions

is considering for development. Performance is based on target specifications, simulated results,

and/or prototype measurements. Commitment to develop is not guaranteed.

PRELIMINARY: Data Sheets contain information regarding a product M/A-COM Technology

Solutions has under development. Performance is based on engineering tests. Specifications are

typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available.

Commitment to produce in volume is not guaranteed.

Rev. V1

App Note [1] Biasing - Please refer to the application diagram below for recommended biasing information.

The table below shows the recommended drain currents for each stage.

Bias Application Schematic

Pin

Voltage (V)

Current (mA)

Comment

VD1

2.5

<1

Drain Bias (Doubler)

VD2

3.0

20

Drain Bias (Buffer Amplifier)

VD3,4,5

4.5

260

Drain Bias (Power Amplifier)

VD6

4.5

270

Drain Bias (Power Amplifier—final stage)

It is possible to bias each stage separately for greater bias control with the following conditions: Id1<1mA,

Id2=20mA, Id3=40mA, Id4=70mA, Id5=150mA, Id6=270mA. It is recommended to use active biasing to keep the

currents constant as the RF power and temperature vary; this gives the most reproducible results. Depending on

the supply voltage available and the power dissipation constraints, the bias circuit may be a single transistor or a

low power operational amplifier, with a low value resistor in series with the drain supply used to sense the cur-

rent. The gate of the pHEMT is controlled to maintain correct drain current and thus drain voltage. The typical

gate voltage needed to do this is -0.7V. Typically the gate is protected with Silicon diodes to limit the applied

voltage. Also, make sure to sequence the applied voltage to ensure negative gate bias is available before apply-

ing the positive drain supply.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

16

15

17

18

19

20

21

22

23

24

25

26

27

28

RFIN

RFOUT

XX1001-QK

Vg1 (-0.7V)

10 nF

1 µF

+

10 nF

1 µF

+

10 nF

1 µF

+

10 nF

1 µF

+

Vd1 (+2.5V)

Vg3,4,5 (-1.2V)

Vg6 (-1.2V)

10 nF

1 µF +

10 nF

1 µF

+

10 nF

1 µF

+

10 nF

1 µF

+

Vg2 (-0.5V)

Vd2 (+3V)

Vd3,4,5 (+ 4.5V)

Vd6 (+ 4.5V)