10

LTC1701/LTC1701B

SW

GND

LTC1701

D1

L1

R2

R1

1701 F04

1

2

3

5

4

BOLD LINES INDICATE HIGH CURRENT PATHS

+

+

Figure 4. LTC1701 Layout Diagram (See Board Layout Checklist)

APPLICATIO S I FOR ATIO

The following table lists thermal resistance for several

different board sizes and copper areas. All measurements

were taken in still air on 3/32" FR-4 board with one ounce

copper.

Table 1. Measured Thermal Resistance

COPPER AREA

THERMAL RESISTANCE

TOPSIDE*

BACKSIDE

BOARD AREA

125

°C/W

125

°C/W

130

°C/W

135

°C/W

150

°C/W

*Device is mounted on topside.

Calculating Junction Temperature

In a majority of applications, the LTC1701 does not dissi-

pate much heat due to its high efficiency. However, in

applications where the switching regulator is running at

high duty cycles or the part is in dropout with the switch

turned on continuously (DC), some thermal analysis is

required. The goal of the thermal analysis is to determine

whether the power dissipated by the regulator exceeds the

maximum junction temperature. The temperature rise is

given by:

is the thermal resistance from the junction of the die to the

ambient temperature.

The junction temperature is given by:

As an example, consider the case when the LTC1701 is in

dropout at an input voltage of 3.3V with a load current of

0.5A. The ON resistance of the P-channel switch is approxi-

mately 0.30

Ω. Therefore, power dissipated by the part is:

The SOT package junction-to-ambient thermal resistance,

the junction temperature of the regulator operating in a

25

°C ambient temperature is approximately:

Remembering that the above junction temperature is ob-

increases with temperature. However, we can safely as-

sume that the actual junction temperature will not exceed

the absolute maximum junction temperature of 125

°C.

Board Layout Considerations

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

LTC1701. These items are also illustrated graphically in the

layout diagram of Figure 4. Check the following in your

layout:

and GND (Pin 2) as close as possible? This capacitor

provides the AC current to the internal P-channel MOSFET

and its driver.

2. Is the Schottky diode closely connected between the

ground (Pin 2) and switch output (Pin 1)?

anode should connect directly to the input capacitor ground.

4. The resistor divider, R1 and R2, must be connected

near GND (Pin 2). The feedback signal FB should be routed

away from noisy components and traces, such as the SW

line (Pin 1).

5. Keep sensitive components away from the SW pin. The

the SW trace and the components L1 and D1.