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AN2834 Datasheet(PDF) 4 Page - STMicroelectronics |
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AN2834 Datasheet(HTML) 4 Page - STMicroelectronics |
4 / 45 page List of figures AN2834 4/45 DocID15067 Rev 2 List of figures Figure 1. Basic schematic of SAR switched-capacitor ADC (example for 10-bit ADC) . . . . . . . . . . . . 5 Figure 2. Sample state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Hold state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. Step 1: Compare with VREF/2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 5. Step 2: If MSB = 1, then compare with ¾ VREF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 6. Step 2: If MSB = 0, then compare with ¼ VREF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 7. Positive offset error representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 8. Negative offset error representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 9. Positive gain error representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 10. Negative gain error representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 11. Differential linearity error representation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 12. Integral linearity error representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 13. Total unadjusted error. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 14. Input signal amplitude vs. ADC dynamic range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 15. Analog signal source resistance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 16. Analog input with RAIN, CAIN and Cp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 17. Effect of injection current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 18. Crosstalk between I/O pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 19. EMI sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 20. Power supply and reference decoupling for 100- and 144-pin packages . . . . . . . . . . . . . . 21 Figure 21. Power supply decoupling for 36-, 48- and 64-pin packages . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 22. Simple quasi-triangular source using a microcontroller output . . . . . . . . . . . . . . . . . . . . . . 23 Figure 23. Selecting the reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 24. Preamplification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 25. Worst case error: VAIN = VREF+. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Figure 26. Recommended values for RAIN and CAIN vs. source frequency FAIN. . . . . . . . . . . . . . . . . . . . . .27 Figure 27. Crosstalk between I/O pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 28. Shielding technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 29. Separating the analog and digital layouts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 30. Separating the analog and digital supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 31. Typical voltage source connection to ADC input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 32. Noise observed on ADC input pin during ADC conversions . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 33. ADC simplified schematic of input stage - sample and hold circuit. . . . . . . . . . . . . . . . . . . 36 Figure 34. ADC input pin noise spikes from internal charge during sampling process . . . . . . . . . . . . 36 Figure 35. Effect of sampling time extension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 36. Charging the external capacitor with too short time between conversions . . . . . . . . . . . . . 38 Figure 37. Implementation of sampling switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 38. Parasitic capacitances of sampling switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 39. Parasitic current example inside ADC structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 |
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Similar Description - AN2834 |
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