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LTC1734 Datasheet(PDF) 10 Page - Linear Technology |
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LTC1734 Datasheet(HTML) 10 Page - Linear Technology |
10 / 12 page 10 LTC1734 Once the maximum power dissipation and VCE(MIN) are known, Table 1 can be used as a guide in selecting some PNPs to consider. In the table, very low VCESAT is less than 0.25V, low VCESAT is 0.25V to 0.5V and the others are 0.5V to 0.8V all depending on the current. See the manufacturer’s data sheet for details. All of the PNP transistors are rated to carry at least 1A continuously as long as the power dissipation is within limits. The Stability section addresses caution in the use of high beta PNPs. Should overheating of the PNP transistor be a concern, protection can be achieved with a positive temperature coefficient (PTC) thermistor, wired in series with the current programming resistor and thermally coupled to the transistor. The PTH9C chip series from Murata has a steep resistance increase at temperature thresholds from 85 °C to 145°C making it behave somewhat like a thermo- stat switch. For example, the model PTH9C16TBA471Q thermistor is 470 Ω at 25°C, but abruptly increase its resistance to 4.7k at 125 °C. Below 125°C, the device exhibits a small negative TC. The 470 Ω thermistor can be added in series with a 1.6k resistor to form the current programming resistor for a 700mA charger. Should the thermistor reach 125 °C, the charge current will drop to 238mA and inhibit any further increase in temperature. Stability The LTC1734 contains two control loops: constant voltage and constant current. To maintain good AC stability in the constant voltage mode, a capacitor of at least 4.7 µF is usually required from BAT to ground. The battery and interconnecting wires appear inductive at high frequen- cies, and since these are in the feedback loop, this capaci- tance may be necessary to compensate for the inductance. This capacitor need not exceed 100 µF and its ESR can range from near zero to several ohms depending on the inductance to be compensated. In general, compensation is optimal with a capacitance of 4.7 µF to 22µF and an ESR of 0.5 Ω to 1.5Ω. Using high beta PNP transistors (>300) and very low ESR output capacitors (especially ceramic) reduces the phase margin, possibly resulting in oscillation. Also, using high value capacitors with very low ESRs will reduce the phase margin. Adding a resistor of 0.5 Ω to 1.5Ω in series with the capacitor will restore the phase margin. In the constant current mode, the PROG pin is in the feedback loop, not the battery. Because of this, capaci- tance on this pin must be limited. Locating the program resistor near the PROG pin and isolating the charge current monitoring circuitry (if used) from the PROG pin with a 1k to 10k resistor may be necessary if the capaci- tance is greater than that given by the following equation: C k R MAX pF PROG () = 400 APPLICATIONS INFORMATION Table 1. PNP Pass Transistor Selection Guide Maximum PD (W) Mounted on Board at TA = 25°C Package Style ZETEX Part Number ROHM Part Number Comments 0.5 SOT-23 FMMT549 Low VCESAT 0.625 SOT-23 FMMT720 Very Low VCESAT, High Beta 1 SOT-89 FCX589 or BCX69 1.1 SOT-23-6 ZXT10P12DE6 Very Low VCESAT, High Beta, Small 1 to 2 SOT-89 FCX717 Very Low VCESAT, High Beta 2 SOT-223 FZT589 Low VCESAT 2 SOT-223 BCP69 or FZT549 0.75 FTR 2SB822 Low VCESAT 1 ATV 2SB1443 Low VCESAT 2 SOT-89 2SA1797 Low VCESAT 10 (TC = 25°C) TO-252 2SB1182 Low VCESAT, High Beta |
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