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LT1713 Datasheet(PDF) 9 Page - Linear Technology |
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LT1713 Datasheet(HTML) 9 Page - Linear Technology |
9 / 16 page 9 LT1713/LT1714 APPLICATIO S I FOR ATIO Poor trace routes and high source impedances are also common sources of problems. Keep trace lengths as short as possible and avoid running any output trace adjacent to an input trace to prevent unnecessary cou- pling. If output traces are longer than a few inches, provide proper termination impedances (typically 100 Ω to 400 Ω) to eliminate any reflections that may occur. Also keep source impedances as low as possible, preferably much less than 1k Ω. The input and output traces should also be isolated from one another. Power supply traces can be used to achieve this isolation as shown in Figure 1, a typical topside layout of the LT1713/LT1714 on a multilayer PC board. Shown is the topside metal etch including traces, pin escape vias and the land pads for a GN16 LT1713/LT1714 and its adjacent X7R 0805 bypass capacitors. The V+, V– and GND traces all shield the inputs from the outputs. Although the two V– pins are connected internally, they should be shorted to- gether externally as well in order for both to function as shields. The same is true for the two V+ pins. The two GND pins are not connected internally, but in most applications they are both connected directly to the ground plane. 1714 F01 Figure 1. Typical LT1714 Topside Metal for Multilayer PCB Layout |
Similar Part No. - LT1713_15 |
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Similar Description - LT1713_15 |
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