UPD70732GD-16-LBB datasheet(8/66 Pages) NEC

Part #	UPD70732GD-16-LBB

Description	V810TM 32-BIT MICROPROCESSOR

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Manufacturer	NEC [NEC]

Direct Link	http://www.nec.com/

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8 / 66 page

8

µPD70732

1.

PIN FUNCTIONS

1.1 Pin Function List

Bus hold

status

during

operation

A31 to A1

3-state

Address bus

Hi-Z

HNote

(Address Bus)

output

D31 to D0

3-state

Bidirectional data bus

Hi-Z

(Data Bus)

I/O

BE3 to BE0

3-state

Indicates valid data bus when data is accessed

Hi-Z

H

(Byte Enable)

output

ST1, ST0

3-state

Indicates type of bus cycle

Hi-Z

H

(Status)

output

DA

3-state

Strobe signal for bus cycle

Hi-Z

H

(Data Access)

output

MRQ

3-state

Indicates memory access

Hi-Z

H

(Memory Request)

output

R/W

3-state

Distinguishes between read access and write access

Hi-Z

H

(Read/Write)

output

BCYST

3-state

Indicates start of bus cycle

Hi-Z

H

(Bus Cycle Start)

output

READY

Input

Extends bus cycle

—

(Ready)

HLDRQ

Input

Requests bus mastership

—

(Hold Request)

HLDAK

Output

Acknowledges HLDRQ

L

H

(Hold Acknowledge)

SZRQ

Input

Requests bus sizing

—

(Bus Sizing Request)

SIZ16B

Input

Fixes external data bus width to 16 bits

—

(Bus Size 16 Bit)

BLOCK

Output

Requests to inhibit use of bus

L

(Bus Lock)

ICHEEN

Input

Operates instruction cache

—

(Instruction Cache Enable)

INT

Input

Interrupt request

—

(Maskable Interrupt)

INTV3 to INTV0

Input

Interrupt level

—

(Interrupt Level)

Note

A1 pin is “H” in the 16-bit bus fixed mode; otherwise, it is “L”.

Bus hold

Bus idle

Name

I/O

Function

status

at reset

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