Specifications ispLSI 1048EA

10

0127/1048EA

Icc can be estimated for the ispLSI 1048EA using the following equation:

Icc = 20mA + (# of PTs * .45) + (# of nets * Max Freq * .0087)

Where:

# of PTs = Number of Product Terms used in design

# of nets = Number of Signals used in device

Max freq = Highest Clock Frequency to the device (in MHz)

The Icc estimate is based on typical conditions (Vcc = 5.0V, room temperature) and an assumption of four GLB

loads on average exists. These values are for estimates only. Since the value of Icc is sensitive to operating

conditions and the program in the device, the actual Icc should be verified.

fmax (MHz)

Notes: Configuration of twelve 16-bit counters, Typical current at 5V, 25¡C

400

300

200

100

0

25

50

75

100

125

150

175

ispLSI 1048EA

500

Power Consumption

Power consumption in the ispLSI 1048EA device de-

pends on two primary factors: the speed at which the

device is operating and the number of Product Terms

used. Figure 4 shows the relationship between power

and operating speed.

Figure 4. Typical Device Power Consumption vs fmax

Package Thermal Characteristics

For the ispLSI 1048EA-170, it is strongly recommended

that the actual Icc be verified to ensure that the maximum

exceeded. Depending on the specific logic design and

clock speed, airflow may be required to satisfy the maxi-

Please refer to the Thermal Management section of the

Lattice Semiconductor Data Book or CD-ROM for addi-

Maximum GRP Delay vs. GLB Loads

GLB Load

3

1

8

16

32

48

4

5

4

2

GRP/GLB/1048EA

1

ispLSI 1048EA-170

ispLSI 1048EA-125

ispLSI 1048EA-100