Specifications ispLSI 2032VL

9

Signal Descriptions

GOE 0

Global Output Enable Pin

Y0

Dedicated Clock input. This clock input is connected to one of the clock inputs of all the GLBs on the

device.

RESET/Y1

This pin performs two functions: (1) Dedicated clock input. This clock input is brought into the Clock

Distribution Network and can optionally be routed to any GLB and/or I/O cell on the device. (2) Active

Low (0) Reset pin which resets all of the GLB and I/O registers in the device.

BSCAN

Input – Dedicated in-system programming Boundary Scan Enable input pin. This pin is brought low to

enable the programming mode. The TMS, TDI, TDO and TCK controls become active.

TDI/IN 0

Input – This pin performs two functions. When

BSCAN is logic low, it functions as an input pin to load

programming data into the device. When

BSCAN is high, it functions as a dedicated input pin.

Input – When

BSCAN is logic low, this pin functions as a mode control pin for the Boundary Scan State

Machine.

TDO/IN 1

Output/Input – This pin performs two functions. When

BSCAN is logic low, it functions as an output pin

pin to read serial shift register data. When

BSCAN is high, it functions as a dedicated input pin.

TCK/Y2

Input – This pin performs two functions. When

BSCAN is logic low, it functions as a clock pin for the

Serial Shift Register. When

BSCAN is high, it functions as a dedicated clock input. This clock input is

brought into the Clock Distribution Network and can optionally be routed to any GLB.

GND

Ground (GND)

VCC

Vcc

No Connect

I/O

Input/Output pins – These are the general purpose I/O pins used by the logic array.

Signal Name

Description

GOE 0

40

2

43

A4

Y0

5

11

5

C1

RESET/Y1

293531D7

BSCAN

713

7

D1

TDI/IN 0

8

14

8

E2

30

36

32

C6

TDO/IN 1

182419G4

TCK/Y2

27

33

29

E7

GND

17, 39

1, 23

18, 42

C4, E4

VCC

6, 28

12, 34

6, 30

D3, D5

——

12, 24, 36, 48

A1, A7, D4, G1, G7

Signal

44-Pin TQFP

44-Pin PLCC

48-Pin TQFP

49-Ball caBGA

1. NC pins are not to be connected to any active signals, VCC or GND.

Signal Locations

I/O Locations

Signal

44-Pin TQFP

44-Pin PLCC

48-Pin TQFP

49-Ball caBGA

I/O 0 - I/O 6

9, 10, 11, 12, 13, 14, 15

15, 16, 17, 18, 19, 20, 21

9, 10, 11, 13, 14, 15, 16

E1, F2, F1, E3, F3, G2, F4

I/O 7 - I/O 13

16, 19, 20, 21, 22, 23, 24

22, 25, 26, 27, 28, 29, 30

17, 20, 21, 22, 23, 25, 26

G3, F5, G5, F6, G6, E5, E6

I/O 14 - I/O 20

25, 26, 31, 32, 33, 34, 35

31, 32, 37, 38, 39, 40, 41

27, 28, 33, 34, 35, 37, 38

F7, D6, C7, B6, B7, C5, B5

I/O 21 - I/O 27

36, 37, 38, 41, 42, 43, 44

42, 43, 44, 3, 4, 5, 6

39, 40, 41, 44, 45, 46, 47

A6, B4, A5, B3, A3, B2, A2

I/O 28 - I/O 31

1, 2, 3, 4

7, 8, 9, 10

1, 2, 3, 4

C3, C2, B1, D2