Specifications GAL20XV10

11

Note: tcf is a calculated value, derived by subtracting tsu from

the period of fmax w/internal feedback (tcf = 1/fmax - tsu). The

value of tcf is used primarily when calculating the delay from

clocking a register to a combinatorial output (through registered

feedback), as shown above. For example, the timing from clock

to a combinatorial output is equal to tcf + tpd.

REGISTER

LOGIC

ARRAY

CLK

Note: fmax with external feedback is calculated from measured

tsu and tco.

REGISTER

LOGIC

ARRAY

CLK

Note: fmax with no feedback may be less than 1/(twh + twl). This

is to allow for a clock duty cycle of other than 50%.

Input Pulse Levels

GND to 3.0V

Input Rise and Fall Times

3ns 10% – 90%

Input Timing Reference Levels

1.5V

Output Timing Reference Levels

1.5V

Output Load

See Figure

3-state levels are measured 0.5V from steady-state active

level.

Output Load Conditions (see figure)

Test Condition

300

Ω

390

Ω

50pF

Active High

∞

390

Ω

50pF

Active Low

300

Ω

390

Ω

50pF

Active High

∞

390

Ω

5pF

Active Low

300

Ω

390

Ω

5pF

C

B

A

TEST POINT

C *

L

FROM OUTPUT (O/Q)

UNDER TEST

+5V

CLK

REGISTER

LOGIC

ARRAY

Switching Test Conditions