LT1110

6

-

LT1110

OPERATI

LT1110

The LT1110 is a gated oscillator switcher. This type

architecture has very low supply current because the

switch is cycled only when the feedback pin voltage drops

below the reference voltage. Circuit operation can best be

understood by referring to the LT1110 block diagram

above. Comparator A1 compares the FB pin voltage with

the 220mV reference signal. When FB drops below

220mV, A1 switches on the 70kHz oscillator. The driver

amplifier boosts the signal level to drive the output NPN

power switch Q1. An adaptive base drive circuit senses

switch current and provides just enough base drive to

ensure switch saturation without overdriving the switch,

resulting in higher efficiency. The switch cycling action

raises the output voltage and FB pin voltage. When the FB

voltage is sufficient to trip A1, the oscillator is gated off. A

small amount of hysteresis built into A1 ensures loop

stability without external frequency compensation. When

the comparator is low the oscillator and all high current

circuitry is turned off, lowering device quiescent current to

just 300

µA for the reference, A1 and A2.

The oscillator is set internally for 10

µs ON time and 5µs

OFF time, optimizing the device for step-up circuits where

as step-down (buck) converters are possible at slight

losses in maximum achievable power output.

A2 is a versatile gain block that can serve as a low battery

detector, a linear post regulator, or drive an under voltage

lockout circuit. The negative input of A2 is internally

connected to the 220mV reference. An external resistor

AO output can sink 300

µA (use a 47k resistor pull up to

+5V). This line can signal a microcontroller that the battery

voltage has dropped below the preset level. To prevent the

gain block from operating in its linear region, a 2M

Ω

resistor can be connected from AO to SET. This provides

positive feedback.

maximum switch current. When the switch current ex-

ceeds the set value, the switch is turned off. This feature

is especially useful when small inductance values are used

with high input voltages. If the internal current limit of 1.5A

delay through the current limit circuitry is about 700ns.

In step-up mode, SW2 is connected to ground and SW1

drives the inductor. In step-down mode, SW1 is con-

is set by the following equation in either step-up or step-

down modes where R1 is connected from FB to GND and

The LT1110-5 and LT1110-12 fixed output voltage ver-

sions have the gain setting resistors on-chip. Only three

external components are required to construct a 5V or 12V

output converter. 16

µA flows through R1 and R2 in the

LT1110-5, and 39

µA flows in the LT1110-12. This current

represents a load and the converter must cycle from time

to time to maintain the proper output voltage. Output

ripple, inherently present in gated oscillator designs, will

typically run around 90mV for the LT1110-5 and 200mV

for the LT1110-12 with the proper inductor/capacitor

selection. This output ripple can be reduced considerably

by using the gain block amp as a pre-amplifier in front of

the FB pin. See the Applications section for details.

I

DAGRA

BLOCK

-5, -12

LT1110

A1

LT1110 • BD02

IN

V

GND

SET

AO

A2

220mV

REF

OSCILLATOR

DRIVER

+

–

R1

SW1

SW2

LIM

I

R2

300k

Ω

SENSE

LT1110-5:

LT1110-12:

R1 = 13.8k

Ω

R2 = 5.6k

Ω

GAIN BLOCK/ERROR AMP

COMPARATOR

Q1

OPERATI

-5, -12

VmV

R

R

()

+









220

2

1

101

.( )