10

LT1169

S

APPLICATI

I FOR ATIO

Input offset current = 3pA

Ω

Input noise = 3.4

High Speed Operation

The low noise performance of the LT1169 was achieved by

enlarging the input JFET differential pair to maximize the

first stage gain. Enlarging the JFET geometry also increases

the parasitic gate capacitance, which if left unchecked, can

result in increased overshoot and ringing. When the feed-

M

Ωrange(Figure6),thispolecancreateexcessphaseshift

effect of the feedback pole is completely removed.

Light Balance Detection Circuit

Unity-Gain Buffer with Extended Load Capacitance

Drive Capability

then

∆CMRR = 11µV/V or 99dB;

then

∆CMRR = 89µV/V or 81dB

By specifying and guaranteeing all of these matching

parameters, the LT1169 can significantly improve the

performance of matching-dependent circuits.

Typical performance of the instrumentation amplifier:

Input offset voltage = 0.8mV

Input bias current = 4pA

Figure 5. Three Op Amp Instrumentation Amplifier

LT1169 • F06

OUTPUT

Figure 6

4

2

3

OUTPUT

C1

30pF

R7

10k

R6

10k

LT1169 • F05

GAIN =

BANDWIDTH =

INPUT REFERRED NOISE =

WIDEBAND NOISE DC TO 330kHz =

100

330kHz

8.7nV/

√Hz AT 1kHz

5.3

0.01

µF

IN–

15V

8

1

–15V

–

+

1/2

LT1169

IC1

1/2

LT1169

IC1

IN+

R3

1k

R2

200

Ω

R1

1k

7

6

5

R4

1k

1

2

3

1/2

LT1169

IC2

R5

1k

LT1169 • TA03

1/2 LT1169

C1

R2

1k

R1

33

Ω

OUTPUT SHORT CIRCUIT CURRENT (

∼ 30mA) WILL LIMIT THE RATE

AT WHICH THE VOLTAGE CAN CHANGE ACROSS LARGE CAPACITORS

(I = C

dV

)

dt

LT1169 • TA04

1/2 LT1169

R1

1M

C1

3pF TO 5pF