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LT1508CSW Datasheet(PDF) 6 Page - Linear Technology

Part # LT1508CSW
Description  Power Factor and PWM Controller(Voltage Mode)
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LT1508CSW Datasheet(HTML) 6 Page - Linear Technology

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6
LT1508
TYPICAL PERFORMANCE CHARACTERISTICS
RSET Voltage vs Current
PKLIM Pin Characteristics
PFC SECTION
GTDR1 (Pin 1): The PFC MOSFET gate driver is a fast
totem pole output which is clamped at 15V. Capacitive
loads like the MOSFET gates may cause overshoot. A gate
series resistor of at least 5
Ω will prevent the overshoot.
GND2 (Pin 2): Power Ground. High current spikes occur
in this line when either GTDR1 or GTDR2 switches low.
GND1 (Pin 3): Analog Ground.
CSET (Pin 4): The capacitor from this pin to GND and RSET
determines oscillator frequency. The oscillator ramp is 5V
and the frequency = 1.5/(RSET CSET).
PKLIM (Pin 5): The threshold of the peak current limit
comparator is GND. To set current limit, a resistor divider
can be connected from VREF to the current sense resistor.
CAOUT (Pin 6): This is the output of the current amplifier
that senses and forces the line current to follow the
reference signal that comes from the multiplier by com-
manding the pulse width modulator. When CAOUT is low,
the modulator has zero duty cycle.
ISENSE (Pin 7): This is the inverting input of the current
amplifier. This pin is clamped at – 0.6V by an ESD protec-
tion diode.
MOUT (Pin 8): This is the multiplier high impedance
current output and the noninverting input of the current
amplifier. This pin is clamped at – 0.6V and 3V.
IAC (Pin 9): This is the AC line voltage sensing input to the
multiplier. It is a current input that is biased at 2V to
minimize the crossover dead zone caused by low line
voltage. At the pin, a 25k resistor is in series with the
current input, so that a lowpass RC can be used to filter out
the switching noise coming down from the line with a high
line impedance environment.
VAOUT (Pin 10): This is the output of the voltage error
amplifier. The output is clamped at 13.5V. When the
output goes below 2.5V, the multiplier output current is
zero.
OVP (Pin 11): This is the input to the overvoltage com-
parator. The threshold is 1.05 times the reference voltage.
When the comparator trips, the multiplier, which is quickly
inhibited, blanks PFC switching to prevent further over-
shoot. This pin is also the input to the PWMOK comparator
that releases the PWM soft start (SS2) after the PFC output
gets close to the final voltage and has a hysteresis of
approximately 150V for 382V PFC output.
VREF (Pin 12): This is the 7.5V reference. When VCC goes
low, VREF will stay at 0V. VREF biases most of the internal
circuitry and can source up to 5mA externally.
VSENSE (Pin 14): This is the inverting input to the voltage
amplifier.
(For application help with the PFC portion of this chip, see the LT1248 data sheet)
PIN FUNCTIONS
RSET CURRENT (mA)
120
100
80
60
40
20
0
–20
–40
–60
–80
–100
1508 G12
–1.0
–0.8
–0.6
–0.4
–0.2
0
TJ = 125°C
TJ = 25°C
TJ = –55°C
PKLIM VOLTAGE (V)
–360
–300
–240
–180
–120
– 60
0
60
120
180
240
300
1508 G13
0.8
0.4
0
–0.4
–0.8
TJ = 125°C
TJ = 25°C
TJ = –55°C


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