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UPD753304P Datasheet(PDF) 2 Page - NEC |
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UPD753304P Datasheet(HTML) 2 Page - NEC |
2 / 56 page 2 µPD753304 FUNCTIONAL OUTLINE Parameter Function Instruction execution time • 1.1, 2.2, 4.4, 17.8 µs (@ 3.6 MHz with main system clock) • 85.1 µs (@ 47 kHz with subsystem clock) On-chip memory ROM 4096 × 8 bits RAM 256 × 4 bits General-purpose register • 4-bit operation: 8 × 4 banks • 8-bit operation: 4 × 4 banks CMOS 12 On-chip pull-up resistors which can be specified by software: 4 input/output Also used for segment pins: 4 LCD controller/driver • Segment selection: 20/24 segments (can be changed to CMOS input/output port in 4 time-unit; max. 4) • Display mode selection: Static 1/2 duty (1/2 bias) 1/3 duty (1/2 bias) 1/3 duty (1/3 bias) 1/4 duty (1/3 bias) • LCD display modes can be selected by mask option Timer 3 channels • 8-bit timer counter: 1 channel (with subclock source input function) • Basic interval timer/watchdog timer: 1 channel • Watch timer: 1 channel Clock output (PCL) • Φ, 3.6 MHz, 450 kHz, 225 kHz (@ 3.6 MHz with main system clock) Buzzer output (BUZ) • 2.94, 5.88, 47 kHz (@ 47 kHz with subsystem clock) • 1.76, 3.52, 28.13 kHz (@ 3.6 MHz with main system clock) Vectored interrupts External: 1, Internal: 2 Test input Internal: 1 System clock oscillation circuit • Main system clock oscillation RC oscillation circuit (with external resistor and 10 pF (typ.) on-chip capacitor) • Subsystem clock oscillation RC oscillation circuit (with on-chip resistor and capacitor) Standby function STOP mode/HALT mode Supply voltage VDD = 2.5 to 5.5 V Operating ambient temperature TA = –10 to +60 °C Package • Volume production product: Pellet/wafer • ES product (for evaluation): 42-pin ceramic shrink DIP (600 mil) Input/ output port |
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