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LT1578CS8 Datasheet(PDF) 9 Page - Linear Technology |
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LT1578CS8 Datasheet(HTML) 9 Page - Linear Technology |
9 / 28 page 9 LT1578/LT1578-2.5 APPLICATIONS INFORMATION In addition to lower switching frequency, the LT1578 also operates at lower switch current limit when the feedback pin voltage drops below 0.7V. Q2 in Figure 2 performs this function by clamping the VC pin to a voltage less than its normal 2.1V upper clamp level. This foldback current limit greatly reduces power dissipation in the IC, diode and inductor during short-circuit conditions. External synchro- nization is also disabled to prevent interference with foldback operation. Again, it is nearly transparent to the user under normal load conditions. The only loads that may be affected are current sources, such as lamps and mo- tors, that maintain high load current with output voltage less than 50% of final value. In these rare situations the feedback pin can be clamped above 0.7V to defeat foldback current limit. Caution: clamping the feedback pin means that frequency shifting will also be defeated, so a combina- tion of high input voltage and dead shorted output may cause the LT1578 to lose control of current limit. The internal circuitry which forces reduced switching frequency also causes current to flow out of the feedback pin when output voltage is low. The equivalent circuitry is shown in Figure 2. Q1 is completely off during normal operation. If the FB pin falls below 0.7V, Q1 begins to conduct current and reduces frequency at the rate of approximately 1kHz/ µA. To ensure adequate frequency foldback (under worst-case short-circuit conditions), the external divider Thevinin resistance must be low enough to pull 35 µA out of the FB pin with 0.5V on the pin (RDIV ≤ 14.3k). The net result is that reductions in frequency and current limit are affected by output voltage divider imped- ance. Although divider impedance is not critical, caution should be used if resistors are increased beyond the suggested values and short-circuit conditions will occur with high input voltage. High frequency pickup will increase and the protection accorded by frequency and current foldback will decrease. MAXIMUM OUTPUT LOAD CURRENT Maximum load current for a buck converter is limited by the maximum switch current rating (IP) of the LT1578. This current rating is 1.5A up to 50% duty cycle (DC), decreasing to 1.3A at 80% duty cycle. This is shown graphically in Typical Performance Characteristics and as shown in the formula below: IP = 1.5A for DC ≤ 50% IP = 1.67 – 0.18 (DC) – 0.32(DC)2 for 50% < DC < 90% DC = Duty cycle = VOUT/VIN Example: with VOUT = 5V, VIN = 8V; DC = 5/8 = 0.625, and; ISW(MAX) = 1.67 – 0.18 (0.625) – 0.32(0.625)2 = 1.43A Current rating decreases with duty cycle because the LT1578 has internal slope compensation to prevent cur- rent mode subharmonic switching. For more details, read Application Note 19. The LT1578 is a little unusual in this regard because it has nonlinear slope compensation which gives better compensation with less reduction in current limit. Maximum load current would be equal to maximum switch current for an infinitely large inductor, but with finite inductor size, maximum load current is reduced by one-half peak-to-peak inductor current. The following formula assumes continuous mode operation, implying that the term on the right is less than one-half of IP. IOUT(MAX) = Continuous Mode For the conditions above and L = 15 µH, I A OUT MAX () − =− () − () () =− = 143 58 5 2 15 10 200 10 8 143 0 31 112 63 . •• .. . At VIN = 15V, duty cycle is 33%, so IP is just equal to a fixed 1.5A, and IOUT(MAX) is equal to: 15 515 5 2 15 10 200 10 15 15 056 0 94 63 . •• .. . − () − () () =− = − A IP − () − () ()( )( ) VV V Lf V OUT IN OUT IN 2 |
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