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LTC1272-3CCS Datasheet(PDF) 5 Page - Linear Technology |
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LTC1272-3CCS Datasheet(HTML) 5 Page - Linear Technology |
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5 / 20 page  5 LTC1272 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 Pin 9 Pin 10 Pin 11 Pin 13 Pin 14 Pin 15 Pin 16 MNEMONIC* D11 D10 D9 D8 D7 D6 D5 D4 D3/11 D2/10 D1/9 D0/8 HBEN = LOW DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 HBEN = HIGH DB11 DB10 DB9 DB8 LOW LOW LOW LOW DB11 DB10 DB9 DB8 PI FU C S TI Data Bus Output, CS and RD = LOW VREF (Pin 2): 2.42V Reference Output. When plugging into an AD7572 socket, reverse the reference bypass capacitor polarity and short the 10 Ω series resistor. AGND (Pin 3): Analog Ground. D11 to D4 (Pins 4-11): Three-State Data Outputs. DGND (Pin 12): Digital Ground. D3/11 to D0/8 (Pins 13-16): Three-State Data Outputs. CLK IN (Pin 17): Clock Input. An external TTL/CMOS compatible clock may be applied to this pin or a crystal can be connected between CLK IN and CLK OUT. CLK OUT (Pin 18): Clock Output. An inverted CLK IN signal appears at this pin. AIN (Pin 1): Analog Input, 0V to 5V Unipolar Input. HBEN (Pin 19): High Byte Enable Input. This pin is used to multiplex the internal 12-bit conversion result into the lower bit outputs (D7 to D0/8). See table below. HBEN also disables conversion starts when HIGH. RD (Pin 20): Read Input. This active low signal starts a conversion when CS and HBEN are low. RD also enables the output drivers when CS is low. CS (Pin 21): The Chip Select Input must be low for the ADC to recognize RD and HBEN inputs. BUSY (Pin 22): The BUSY Output is low when a conver- sion is in progress. NC (Pin 23): Not Connected Internally. The LTC1272 does not require negative supply. This pin can accommodate the –15V required by the AD7572 without problems. VDD (Pin 24): Positive Supply, 5V. *D11...D0/8 are the ADC data output pins. DB11...DB0 are the 12-bit conversion results, DB11 is the MSB. CC HARA TERISTICS A TYPICALPERFOR CE Integral Nonlinearity CODE 0 –1.0 1.0 512 1024 4096 LTC1272 • TPC01 1536 2048 2560 3072 3584 0 VDD = 5V fCLK = 4MHz 0 0.5 – 0.5 |
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