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LTC1746 Datasheet(PDF) 1 Page - Linear Technology

Part # LTC1746
Description  Low Power,14-Bit, 25Msps ADC
Download  20 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1746 Datasheet(HTML) 1 Page - Linear Technology

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1
LTC1746
1746f
APPLICATIO S
FEATURES
DESCRIPTIO
BLOCK DIAGRA
Low Power,14-Bit, 25Msps ADC
s
Sample Rate: 25Msps
s
77.5dB SNR and 91dB SFDR (3.2V Range)
s
74dB SNR and 96dB SFDR (2V Range)
s
No Missing Codes
s
Single 5V Supply
s
Low Power Dissipation: 390mW
s
Selectable Input Ranges:
±1V or ±1.6V
s
240MHz Full Power Bandwidth S/H
s
Pin Compatible Family
25 Msps: LTC1746 (14-Bit), LTC1745 (12-Bit)
50 Msps: LTC1744 (14-Bit), LTC1743 (12-Bit)
65 Msps: LTC1742 (14-Bit), LTC1741 (12-Bit)
80 Msps: LTC1748 (14-Bit), LTC1747 (12-Bit)
s
Telecommunications
s
Medical Imaging
s
Receivers
s
Base Stations
s
Spectrum Analysis
s
Imaging Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
The LTC
®1746 is a 25Msps, sampling 14-bit A/D con-
verter designed for digitizing high frequency, wide dy-
namic range signals. Pin selectable input ranges of
±1V
and
±1.6V along with a resistor programmable mode
allow the LTC1746’s input range to be optimized for a wide
variety of applications.
The LTC1746 is perfect for demanding communications
applications with AC performance that includes 77.5dB
SNR and 91dB spurious free dynamic range. Ultralow jitter
of 0.3psRMS allows undersampling with excellent noise
performance. DC specs include
±3LSB INL maximum and
no missing codes over temperature.
The digital interface is compatible with 5V, 3V and 2V logic
systems. The ENC and ENC inputs may be driven differen-
tially from PECL, GTL and other low swing logic families or
from single-ended TTL or CMOS. The low noise, high gain
ENC and ENC inputs may also be driven by a sinusoidal
signal without degrading performance. A separate digital
output power supply can be operated from 0.5V to 5V,
making it easy to connect directly to low voltage DSPs
or FIFOs.
The TSSOP package with a flow-through pinout simplifies
the board layout.
25Msps, 14-Bit ADC with a
±1V Differential Input Range
14-BIT
PIPELINED ADC
14
S/H
AMP
±1V
DIFFERENTIAL
ANALOG INPUT
AIN
+
AIN
SENSE
VCM
4.7
µF
DIFF AMP
REFLA
REFHB
GND
1746 BD
ENC
4.7
µF
1
µF1µF
0.1
µF
0.1
µF
REFHA
REFLB
BUFFER
RANGE
SELECT
2.35VREF
OUTPUT
LATCHES
CONTROL LOGIC
OVDD
VDD
OGND
0.5V TO 5V
5V
0.1
µF
1
µF
1
µF
1
µF
D13
D0
CLKOUT
OF
ENC
DIFFERENTIAL
ENCODE INPUT
OE
MSBINV
0.1
µF


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