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LTC1380IS Datasheet(PDF) 6 Page - Linear Technology |
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LTC1380IS Datasheet(HTML) 6 Page - Linear Technology |
6 / 12 page 6 LTC1380/LTC1393 PIN FUNCTIONS S0 to S7/S0± to S3± (Pin 1 to Pin 8): Single-Ended Analog Multiplexer Inputs (S0 to S7) for the LTC1380. Differential Analog Multiplexer Inputs (S0± to S3±) for the LTC1393. DO/DO+(Pin9):AnalogMultiplexerOutputfortheLTC1380. Positive Differential Analog Multiplexer Output for the LTC1393. VEE/DO– (Pin 10): Negative Supply Pin for the LTC1380. Negative Differential Multiplexer Output for the LTC1393. For the LTC1380, VEE should be bypassed to GND with a 0.1 µF ceramic capacitor when operating from split sup- plies or connected to GND for single supply operation. GND (Pin 11): Ground Pin. A1, AO (Pin 12, Pin 13): Address Selection Pins. Tie these two pins to either VCC or GND to select one of four possible addresses to which the LTC1380/LTC1393 will respond. SDA (Pin 14): SMBus Bidirectional Digital Input/Output Pin. This pin has an open-drain output and requires a pull- up resistor or current source to the positive supply for normal operation. Data is shifted into and acknowledged by the LTC1380/LTC1393 using this pin. SCL (Pin 15): SMBus Clock Input. SDA data is shifted in at rising edges of this clock during data transfer. VCC (Pin 16): Positive Supply Pin. This pin should be bypassed to GND with a 0.1 µF ceramic capacitor. BLOCK DIAGRA ADDRESS COMPARATOR SMBus STATE MACHINE 4-BIT LATCH AND DECODER SHIFT REGISTER HOLD STOP 1380/93 BD SDA A0 A1 SCL MULTIPLEXER SWITCHES ANALOG OUTPUT(S) (LTC1380: DO) (LTC1393: DO±) ANALOG INPUTS (LTC1380: S0 TO S7) (LTC1393: S0± TO S3±) |
Similar Part No. - LTC1380IS |
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Similar Description - LTC1380IS |
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