6

LTC1380/LTC1393

Multiplexer Inputs (S0 to S7) for the LTC1380. Differential

Positive Differential Analog Multiplexer Output for the

LTC1393.

Negative Differential Multiplexer Output for the LTC1393.

0.1

µF ceramic capacitor when operating from split sup-

plies or connected to GND for single supply operation.

GND (Pin 11): Ground Pin.

A1, AO (Pin 12, Pin 13): Address Selection Pins. Tie these

addresses to which the LTC1380/LTC1393 will respond.

SDA (Pin 14): SMBus Bidirectional Digital Input/Output

Pin. This pin has an open-drain output and requires a pull-

up resistor or current source to the positive supply for

normal operation. Data is shifted into and acknowledged

by the LTC1380/LTC1393 using this pin.

SCL (Pin 15): SMBus Clock Input. SDA data is shifted in

at rising edges of this clock during data transfer.

bypassed to GND with a 0.1

µF ceramic capacitor.

BLOCK DIAGRA

ADDRESS

COMPARATOR

SMBus STATE

MACHINE

4-BIT LATCH

AND DECODER

SHIFT REGISTER

HOLD

STOP

1380/93 BD

SDA

A0

A1

SCL

MULTIPLEXER

SWITCHES

ANALOG OUTPUT(S)

ANALOG INPUTS

(LTC1380: S0 TO S7)