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LTC1435ACS Datasheet(PDF) 9 Page - Linear Technology |
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LTC1435ACS Datasheet(HTML) 9 Page - Linear Technology |
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9 / 20 page  9 LTC1435A APPLICATIONS INFORMATION a fixed inductor value, but it is very dependent on induc- tance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core loss and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means that in- ductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple.Do not allow the core to saturate! Molypermalloy (from Magnetics, Inc.) is a very good, low loss core material for toroids, but it is more expensive than ferrite. A reasonable compromise from the same manufac- turer is Kool M µ.Toroidsareveryspaceefficient,especially when you can use several layers of wire. Because they generally lack a bobbin, mounting is more difficult. How- ever, designs for surface mount are available which do not increase the height significantly. Power MOSFET and D1 Selection Two external power MOSFETs must be selected for use with the LTC1435A: an N-channel MOSFET for the top (main) switch and an N-channel MOSFET for the bottom (synchro- nous) switch. The peak-to-peak gate drive levels are set by the INTVCC voltage. This voltage is typically 5V during start-up (see EXTVCC Pin Connection). Consequently, logic level thresh- old MOSFETs must be used in most LTC1435A applications. The only exception is applications in which EXTVCC is powered from an external supply greater than 8V (must be less than 10V), in which standard threshold MOSFETs (VGS(TH)<4V)maybeused.PaycloseattentiontotheBVDSS specification for the MOSFETs as well; many of the logic level MOSFETs are limited to 30V or less. Selection criteria for the power MOSFETs include the “ON” resistance RDS(ON), reverse transfer capacitance CRSS, in- put voltage and maximum output current. When the LTC1435A is operating in continuous mode the duty cycles for the top and bottom MOSFETs are given by: Main Switch Duty Cycle = V V Synchronous Switch Duty Cycle = V OUT IN IN − () V V OUT IN The MOSFET power dissipations at maximum output cur- rent are given by: P V V IR IC f P VV V IR MAIN OUT IN MAX DS ON MAX RSS SYNC IN OUT IN MAX DS ON = () + () + () ( )( )( ) = − () + () () () 2 185 2 1 1 δ δ k VIN . where δ is the temperature dependency of RDS(ON) and k is a constant inversely related to the gate drive current. Both MOSFETs have I2R losses while the topside N-channel equation includes an additional term for tran- sition losses, which are highest at high input voltages. For VIN < 20V the high current efficiency generally im- proves with larger MOSFETs, while for VIN > 20V the transition losses rapidly increase to the point that the use of a higher RDS(ON) device with lower CRSS actual pro- vides higher efficiency. The synchronous MOSFET losses are greatest at high input voltage or during a short circuit when the duty cycle in this switch is nearly 100%. Refer to the Foldback Current Limiting section for further appli- cations information. The term (1 + δ)isgenerallygivenforaMOSFETintheform of a normalized RDS(ON) vs Temperature curve, but δ = 0.005/°C can be used as an approximation for low voltage MOSFETs. CRSS is usually specified in the MOSFET characteristics. The constant k = 2.5 can be used to esti- mate the contributions of the two terms in the main switch dissipation equation. The Schottky diode D1 shown in Figure 1 conducts during the dead-time between the conduction of the two large power MOSFETs. This prevents the body diode of the bot- tom MOSFET from turning on and storing charge during the dead-time, which could cost as much as 1% in efficiency. A 1A Schottky is generally a good size for 3A regulators. |
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