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LTC1436AIGN-PLL Datasheet(PDF) 11 Page - Linear Technology |
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LTC1436AIGN-PLL Datasheet(HTML) 11 Page - Linear Technology |
11 / 28 page 11 LTC1436A LTC1436A-PLL/LTC1437A OPERATIO (Refer to Functional Diagram) Power-On Reset The POR pin is an open drain output which pulls low when the main regulator output voltage is out of regulation. When the output voltage rises to within 7.5% of regula- tion, a timer is started which releases POR after 216 (65536) oscillator cycles. In shutdown, the POR output is pulled low. Auxiliary Linear Regulator The auxiliary linear regulator in the LTC1436A/LTC1437A controls an external PNP transistor for operation up to 500mA. An internal AUXFB resistive divider set for 12V operation is invoked when AUXDR pin is above 9.5V to allow 12V VPP supplies to be easily implemented. When AUXDR is below 8.5V an external feedback divider may be used to set other output voltages. Taking the AUXON pin low shuts down the auxiliary regulator providing a conve- nient logic controlled power supply. The AUX block can be used as a comparator having its inverting input tied to the internal 1.19V reference. The AUXDR pin is used as the output and requires an external pull-up to a supply less than 8.5V in order to inhibit the invoking of the internal resistive divider. INTVCC/DRVCC/EXTVCC Power Power for the top and bottom MOSFET drivers and most of the other LTC1436A/LTC1437A circuitry is derived from the INTVCC pin. The bottom MOSFET driver supply DRVCC pin is internally connected to INTVCC in the LTC1436A and externally connected to INTVCC in the LTC1437A. When the EXTVCC pin is left open, an internal 5V low dropout regulator supplies INTVCC power. If EXTVCC is taken above 4.8V, the 5V regulator is turned off and an internal switch is turned on to connect EXTVCC to INTVCC. This allows the INTVCC power to be derived from a high efficiency external source such as the output of the regulator itself or a secondary winding, as described in the Applications Infor- mation section. APPLICATIONS INFORMATION The basic LTC1436A application circuit is shown in Figure 1, High Efficiency Step-Down Converter. External compo- nent selection is driven by the load requirement, and begins with the selection of RSENSE. Once RSENSE is known, COSC and L can be chosen. Next, the power MOSFETs and D1 are selected. Finally, CIN and COUT are selected. The circuit shown in Figure 1 can be configured for operation up to an input voltage of 28V (limited by the external MOSFETs). RSENSE Selection For Output Current RSENSE is chosen based on the required output current. The LTC1436A/LTC1437A current comparator has a maxi- mum threshold of 150mV/RSENSE and an input common mode range of SGND to INTVCC. The current comparator threshold sets the peak of the inductor current, yielding a maximum average output current IMAX equal to the peak value less half the peak-to-peak ripple current ∆IL. Allowing a margin for variations in the LTC1436A/ LTC1437A and external component values yields: R mV SENSE MAX = 100 I The LTC1436A/LTC1437A work well with RSENSE values ≥ 0.005Ω. COSC Selection for Operating Frequency The LTC1436A/LTC1437A use a constant frequency architecture with the frequency determined by an external oscillator capacitor COSC. Each time the topside MOSFET turns on, the voltage on COSC is reset to ground. During the on-time, COSC is charged by a fixed current plus an additional current which is proportional to the output voltage of the phase detector VPLLLPF (LTC1436A-PLL/ LTC1437A). When the voltage on the capacitor reaches 1.19V, COSC is reset to ground. The process then repeats. The value of COSC is calculated from the desired operating frequency. Assuming the phase-locked loop has no exter- nal oscillator input (VPLLLPF = 0V): |
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