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LTC1451IS8 Datasheet(PDF) 6 Page - Linear Technology |
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LTC1451IS8 Datasheet(HTML) 6 Page - Linear Technology |
6 / 12 page 6 LTC1451 LTC1452/LTC1453 GND: Ground. REF: The Output of the Internal Reference and the Input to the DAC Resistor Ladder. An external reference with voltage up to VCC/2 may be used for the LTC1452. VOUT: The Buffered DAC Output. VCC: The Positive Supply Input. 4.5V ≤ VCC ≤ 5.5V (LTC1451), 2.7 ≤ VCC ≤ 5.5V (LTC1452/LTC1453). Re- quires a bypass capacitor to ground. CLK: The TTL Level Input for the Serial Interface Clock. DIN: The TTL Level Input for the Serial Interface Data. Data on the DIN pin is latched into the shift register on the rising edge of the serial clock. CS/LD: The TTL Level Input for the Serial Interface Enable and Load Control. When CS/LD is low the CLK signal is enabled, so the data can be clocked in. When CS/LD is pulled high, data is loaded from the shift register into the DAC register, updating the DAC output. DOUT: The Output of the Shift Register which Becomes Valid on the Rising Edge of the Serial Clock. B11 MSB B10 t1 t9 B1 t6 B0 LSB B11 CURRENT WORD t7 t2 t4 t3 t8 CLK DIN DOUT CS/LD t5 1451/2/3 TD B0 PREVIOUS WORD B11 PREVIOUS WORD B10 B1 B0 DAC REGISTER LD + – REFERENCE LTC1451: 2.048V LTC1453: 1.22V 12-BIT SHIFT REGISTER POWER-ON RESET 11451/2/3 BD CLK 1 DIN 2 DOUT 4 VOUT 7 REF 6 GND 5 VCC 8 3 CS/LD 12-BIT DAC PI FU CTIO S BLOCK DIAGRA TI I G DIAGRA |
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