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UPD75P3036 Datasheet(PDF) 8 Page - NEC |
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UPD75P3036 Datasheet(HTML) 8 Page - NEC |
8 / 64 page 8 µPD75P3036 3.1 Port Pins (2/2) Pin name I/O Alternate Function 8-bit Status I/O circuit function I/O after reset typeNote 1 P60 I/O KR0 This is a programmable 4-bit I/O port (PORT6). Yes Input <F> -A Input and output can be specified in bit units. P61 KR1 Connection of an on-chip pull-up resistor can be specified in 4-bit units by software. P62 KR2 P63 KR3 P70 I/O KR4 This is a 4-bit I/O port (PORT7). Input <F> -A Connection of an on-chip pull-up resistor can be P71 KR5 specified in 4-bit units by software. P72 KR6 P73 KR7 P80 I/O TI1 This is a 4-bit I/O port (PORT8). No Input <E> -E Connection of an on-chip pull-up resistor can be P81 TI2 specified in 4-bit units by software. P82 AN6 Y-B P83 AN7 BP0 Output S24 These pins are also used as 1-bit I/O port (BIT No Note 2 H-A PORT) segment output pin. BP1 S25 BP2 S26 BP3 S27 BP4 Output S28 BP5 S29 BP6 S30 BP7 S31 Notes 1. Circuit types enclosed in brackets indicate Schmitt trigger input. 2. BP0 through BP7 select VLC1 as an input source. However, the output levels change depending on the external circuit of BP0 through BP7 and VLC1. Example Because BP0 through BP7 are mutually connected inside the µPD75P3036, the output levels of BP0 through BP7 are determined by R1, R2, and R3. * * PD75P3036 VLC1 R1 ON ON BP1 BP0 R2 R3 VDD µ |
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Similar Description - UPD75P3036 |
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