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LTC1735IS-1 Datasheet(PDF) 11 Page - Linear Technology |
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LTC1735IS-1 Datasheet(HTML) 11 Page - Linear Technology |
11 / 28 page 11 LTC1735-1 APPLICATIO S I FOR ATIO The value of COSC is calculated from the desired operating frequency assuming no external clock input on the PGOOD pin: CpF Frequency OSC() .( ) – = 161 10 11 7 A graph for selecting COSC versus frequency is given in Figure 2. The maximum recommended switching fre- quency is 550kHz . The internal oscillator runs at its nominal frequency (fO) when the PGOOD pin is pulled high (to INTVCC) though a series resistor or connected to ground. Clocking the PGOOD pin above and below 1.2V will cause the internal oscillator to injection-lock to an external clock signal applied to the PGOOD pin with a frequency between 0.9fO and 1.3fO. The clock high level must exceed 1.3V for at least 0.3 µs, and the clock low level must be less than 0.3V for at least 0.3 µs. The top MOSFET turn-on will synchro- nize with the rising edge of the external clock. Attempting to synchronize to too high of an external frequency (above 1.3fO) can result in inadequate slope compensation and possible loop instability at high duty cycles. If this condition exists, simply lower the value of COSC so (fEXT = fO) according to Figure 2. clamp present in Burst Mode operation is removed, providing constant frequency discontinuous operation over the widest possible output current range. In this mode the synchronous MOSFET is forced on once every 10 clock cycles to recharge the bootstrap capacitor. This minimizes audible noise while maintaining reasonably high efficiency. Inductor Value Calculation The operating frequency and inductor selection are inter- related in that higher operating frequencies allow the use of smaller inductor and capacitor values. So why would anyone ever choose to operate at lower frequencies with larger components? The answer is efficiency. A higher frequency generally results in lower efficiency because of MOSFET gate charge losses. In addition to this basic trade off, the effect of inductor value on ripple current and low current operation must also be considered. The inductor value has a direct effect on ripple current. The inductor ripple current ∆IL decreases with higher induc- tance or frequency and increases with higher VIN or VOUT: ∆I fL V V V L OUT OUT IN = 1 1 ()( ) – Accepting larger values of ∆IL allows the use of low inductances, but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is ∆IL= 0.3 to 0.4(IMAX). Remember, the maximum ∆IL occurs at the maximum input voltage. The inductor value also has an effect on low current operation. The transition to low current operation begins when the inductor current reaches zero while the bottom MOSFET is on. Burst Mode operation begins when the average inductor current required results in a peak current below 25% of the current limit determined by RSENSE. Lower inductor values (higher ∆IL) will cause this to occur at higher load currents, which can cause a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to decrease. Figure 2. Timing Capacitor Value OPERATING FREQUENCY (kHZ) 0 100 200 300 400 500 600 1735-1 F02 100.0 87.5 75.0 62.5 50.0 37.5 25.0 12.5 0 When synchronized to an external clock, Burst Mode operation is disabled but the inductor current is not allowed to reverse. The 25% minimum inductor current |
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