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LF2249QC25 Datasheet(PDF) 2 Page - LOGIC Devices Incorporated |
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LF2249QC25 Datasheet(HTML) 2 Page - LOGIC Devices Incorporated |
2 / 8 page DEVICES INCORPORATED LF2249 12 x 12-bit Digital Mixer Video Imaging Products 08/16/2000–LDS.2249-J 2 synchronous operation between the incoming data and all available control functions. The LF2249 oper- ates at a clock rate of 40 MHz over the full commercial temperature and supply voltage ranges. Because of its flexibility, the LF2249 is ideally suited for applications such as image switching and mixing, digital quadrature mixing and modulating, FIR filtering, and arithmetic function and waveform synthesis. SIGNAL DEFINITIONS Power VCC and GND +5 V power supply. All pins must be connected. Clock CLK — Master Clock The rising edge of CLK strobes all en- abled registers. All timing specifica- tions are referenced to the rising edge of CLK. Inputs A11-0–D11-0 — Data Inputs A11-0–D11-0 are 12-bit data input regis- ters. Data is latched into the input reg- isters on the rising edge of CLK. The contents of the input registers are clocked into the top of the correspond- ing 16-stage pipeline delay (pushing the contents of the register stack down one register position) on the next clock cycle if the pipeline register stack is enabled. The LSBs are A0-D0 (Figure 1a). CAS15-0 — Cascade Data Input CAS15-0 is the 16-bit cascade data input port. Data is latched into the register on the rising edge of CLK. The LSB is CAS0 (Figure 1a). ADEL3-0 A11-0 ENA 16 : 1 4 12 12 CLK R1 R2 R16 DETAILED VIEW OF BLOCK DIAGRAM OUTLINED AREA 10 9 8 11 76543210 2 10 2 9 2 8 –2 11 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 (Sign) 15 14 13 10 9 8 12 11 76543210 –2 23 222 221 2 18 217 216 2 20 219 2 15 214 213 212 211 210 29 28 (Sign) FIGURE 1A.INPUT FORMATS 15 14 13 10 9 8 12 11 76543210 –2 23 222 221 2 18 217 216 2 20 219 2 15 214 213 212 211 210 29 28 (Sign) 15 14 13 10 9 8 12 11 76543210 2 15 2 14 213 2 10 2 9 2 8 2 12 211 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 FIGURE 1B.OUTPUT FORMATS Cascade Input Data Input Sum Output (Upper 16 bits) Sum Output (Lower 16 bits) |
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