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LSH32JC32 Datasheet(PDF) 4 Page - LOGIC Devices Incorporated

Part # LSH32JC32
Description  32-bit Cascadable Barrel Shifter
Download  9 Pages
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Manufacturer  LODEV [LOGIC Devices Incorporated]
Direct Link  http://www.logicdevices.com
Logo LODEV - LOGIC Devices Incorporated

LSH32JC32 Datasheet(HTML) 4 Page - LOGIC Devices Incorporated

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DEVICES INCORPORATED
LSH32
32-bit Cascadable Barrel Shifter
Special Arithmetic Functions
08/16/2000–LDS.32-Q
ffs4
LONG-WORD NORMALIZATION
(MULTIPLE CYCLES)
Normalization of floating point
mantissas longer than 32 bits can be
accomplished by cascading LSH32
units. When cascading for normaliza-
tion, the device inputs are overlapped
such that each device lower in priority
than the first shares 16 inputs with its
more significant neighbor. Fill mode
and left shift are selected, however,
internal normalization (NORM) is not
used. The most significant result half
of each device is enabled to the
output. The shift out (SO4–SO0) lines
of the most significant slice are
connected to the shift in lines of all
clock normalization requiring shifts
longer than 16 bits can be accom-
plished by a bank-select technique
described below.
SINGLE CYCLE LONG-WORD
NORMALIZATION
An extension of the above concept is a
single clock normalization of long
words (potentially requiring shifts of
more than 15 places). The arrange-
ment of LSH32s required is shown in
Figure 1. Cascading of LSH32 units is
accomplished by connecting the SI3
SI0 input lines of each unit to the SO3
SO0 outputs of the most significant
device in the row as before. Essen-
slices, including the first. The excep-
tion is that all SI4 lines are grounded,
limiting the shift distance to 16
positions. The shift distance required
for normalization is produced by the
priority encoder in the most signifi-
cant slice. The priority encoder will
produce the shift code necessary to
normalize the input word if the
leading non-zero digit is found in the
upper 16 bits. If this is the case, the
number of shift positions necessary to
accomplish normalization is placed on
the SO4 –SO0 outputs for use by all
slices, and the appropriate 0–15 bit
shift is accomplished. If the upper 16
bits are all zero, then the maximum
shift of 15 places is executed. Single
FIGURE 1.
SINGLE CYCLE LONG-WORD NORMALIZATION USING LSH32S
LSH32
SI3-0
5
SO4-0
OE
4
LSH32
5
OE
4
LSH32
5
OE
4
LSH32
5
OE
4
SI4
LSH32
OE
4
LSH32
OE
4
LSH32
OE
4
LSH32
OE
4
LSH32
OE
4
LSH32
OE
4
SI4
SI4
I63-I48
Y63-Y48
MSBs
PRIORITY
ENCODE
2:4
DECODE
I47-I32
I31-I16
I15-I0
0
I47-I32
I31-I16
I15-I0
0
I31-I16
I15-I0
0
I16-I0
0
SI3-0
SI3-0
SI3-0
SO4-0
SI3-0
SI3-0
SI3-0
SI3-0
SO4-0
SI3-0
SI4
SI3-0
SO4-0
Y47-Y32
Y31-Y16
Y15-Y0


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