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UPD784044GC Datasheet(PDF) 5 Page - NEC |
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UPD784044GC Datasheet(HTML) 5 Page - NEC |
5 / 90 page µPD784044(A), 784046(A) 5 CONTENTS 1. DIFFERENCES BETWEEN µPD784044(A) AND 784046(A) ............................................................7 2. PIN CONFIGURATION (Top View) ..................................................................................................... 8 3. SYSTEM CONFIGURATION EXAMPLE ........................................................................................... 10 4. BLOCK DIAGRAM ............................................................................................................................. 11 5. PIN FUNCTIONS ................................................................................................................................12 5.1 Port Pins .................................................................................................................................................... 12 5.2 Pins Other Than Port Pins ...................................................................................................................... 14 5.3 I/O Circuits of Pins and Processing of Unused Pins .......................................................................... 16 6. CPU ARCHITECTURE .......................................................................................................................18 6.1 Memory Space .......................................................................................................................................... 18 6.2 CPU Registers ........................................................................................................................................... 21 6.2.1 General-purpose registers ............................................................................................................. 21 6.2.2 Control registers ............................................................................................................................. 22 6.2.3 Special function registers (SFRs) .................................................................................................. 23 7. PERIPHERAL HARDWARE FUNCTIONS ........................................................................................29 7.1 Ports ........................................................................................................................................................... 29 7.2 Clock Generation Circuit ......................................................................................................................... 30 7.3 Real-Time Output Port ............................................................................................................................. 32 7.4 Timer/Counter ........................................................................................................................................... 32 7.5 A/D Converter ........................................................................................................................................... 35 7.6 Serial Interface .......................................................................................................................................... 36 7.6.1 Asynchronous serial interface/3-wire serial I/O (UART/IOE) ....................................................... 37 7.7 Edge Detection Circuit ............................................................................................................................ 39 7.8 Watchdog Timer ........................................................................................................................................ 39 8. INTERRUPT FUNCTION .................................................................................................................... 40 8.1 Interrupt Source ....................................................................................................................................... 40 8.2 Vectored Interrupt .................................................................................................................................... 42 8.3 Context Switching .................................................................................................................................... 43 8.4 Macro Service ........................................................................................................................................... 44 9. LOCAL BUS INTERFACE .................................................................................................................47 9.1 Memory Expansion .................................................................................................................................. 48 9.2 Memory Space .......................................................................................................................................... 49 9.3 Programmable Wait .................................................................................................................................. 49 9.4 Bus Sizing Function ................................................................................................................................. 49 |
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