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UPD784044GCA Datasheet(PDF) 11 Page - NEC |
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UPD784044GCA Datasheet(HTML) 11 Page - NEC |
11 / 90 page µPD784044(A), 784046(A) 11 4. BLOCK DIAGRAM Programmable interrupt controller INTP0-INTP6 NMI TO00-TO03 INTP0-INTP3 TO10, TO11 A/D converter AVDD AVSS AVREF INTP4 ANI0-ANI15 Watchdog timer Timer 4 (16 bits) Timer 1 (16 bits) Timer 0 (16 bits) 78K/IV CPU core ROM RAM BUS I/F BWD AD0-AD15 A16-A19 RD LWR, HWR ASTB WAIT CLKOUT RESET MODE X1 X2 System control P00-P03 Port 0 Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 Port 7 Port 8 Port 9 P10-P12 P20 P21-P27 VDD VSS P30-P37 P40-P47 P50-P57 P60-P63 P70-P77 P80-P87 P90-P94 Baud-rate generator UART/IOE1 Baud-rate generator UART/IOE2 TxD/SO1 RxD/SI1 ASCK/SCK1 TxD2/SO2 RxD2/SI2 ASCK2/SCK2 Timer/counter2 (16 BITS) TO20, TO21 INTP5/TI2 TO30, TO31 INTP6/TI3 RTP0-RTP3 Real-time output port Timer/counter3 (16 BITS) Remark The internal ROM and RAM capacity differs depending on the products. |
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Similar Description - UPD784044GCA |
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