 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
UPD78C14G Datasheet(PDF) 8 Page - NEC |
|
||||||||||||||||||||||||||||||
UPD78C14G Datasheet(HTML) 8 Page - NEC |
|
|
8 / 52 page  8 µPD78C14(A) (Continued) Pin Input/Output Function RD Output This is a strobe signal output to read data from external memory. This signal (Read becomes high level except during the data read machine cycle for external memory. Strobe) This signal becomes output high impedance when the RESET signal is low or in the hardware STOP mode. ALE Output This is a strobe signal to externally latch the low-order address information (Address output to pins PD7-PD0 to access the external memory. This signal becomes Latch output high impedance when the RESET signal is low or in the hardware STOP Enable) mode. MODE0 Input/Output Set the MODE0 pin to 0 (low level) and MODE1 pin to 1 (high level)Note. MODE1 When both pins MODE0 and MODE1 are set to 1Note, these pins synchronize to (Mode) the ALE and a control signal is output. NMI Input This pin inputs the edge triggering (falling edge) nonmaskable interrupt. (Non- Maskable Interrupt) INT1 Input This pin inputs edge triggering (rising edge) maskable interrupt. This pin is also (Interrupt shared with zero-cross detection pin for AC input. Request) AN7-AN0 Input These eight pins input analog signals for the A/D converter. Pins AN7-AN4 can (Analog be used as edge detection (falling edge) input. Input) VAREF Input This pin inputs the reference voltage for the A/D converter and controls the (Reference operation for the A/D converter. Voltage) AVDD Power supply pin for the A/D converter (Analog VDD) AVSS Ground pin for the A/D converter (Analog VSS) X1, X2 These are crystal connecting pins for the system clock oscillation. When a clock (Crystal) is externally supplied, input it through pin X1. Input the clock to X1 and its reverse phase to X2. RESET Input This pin inputs the active-low reset input signal. (Reset) STOP Input This pin inputs control signal of the hardware STOP mode. When the low level (Stop) of this signal is input, the oscillator stops to operate. VDD Positive power supply pin VSS Ground pin Note Pull-up with the following external resistor: 4 (k Ω) ≤ R ≤ 0.4 tCYC (kΩ)tCYC (unit: ns) Example 4 (k Ω) ≤ R ≤ 26 (kΩ): tCYC = 66 (ns) at 15 MHz 4 (k Ω) ≤ R ≤ 33 (kΩ): tCYC = 83 (ns) at 12 MHz |
Similar Part No. - UPD78C14G |
|
Similar Description - UPD78C14G |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
