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LXT332 Datasheet(PDF) 9 Page - Level One

Part # LXT332
Description  Dual T1/E1 Line Interface Unit with Crystal-less Attenuation
Download  32 Pages
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Manufacturer  LVL1 [Level One]
Direct Link  http://www.level1.com/
Logo LVL1 - Level One

LXT332 Datasheet(HTML) 9 Page - Level One

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ìæ
RCLK0
DO
Receive Clock - Port 0. This clock is recovered from the input signal. Under
Loss of Signal (LOS) conditions, this output is derived from MCLK.
ëå
TAOS0
DI
Transmit All Ones Enable - Port 0. When TAOS is High and RLOOP is
Low, the TPOS/TNEG or TDATA input is ignored and port 0 transmits a
stream of ones at the TCLK frequency. If TCLK is not provided, the MCLK
input is used as the transmit reference.
ê
é
è
ä
ìí
ìì
LEN20
LEN10
LEN00
DI
DI
DI
Line Length Equalizer Inputs - Port 0. This pins determine the shape and
amplitude of the transmit pulse.
çìë
MCLK
DI
Master Clock. The master clock (1.544 MHz for T1, 2.048 MHz for E1) input
must be independent, free-running, continuously active and jitter free for
receiver operation. Since the transceivers derive their RCLK timing from the
MCLK input on Loss of Signal (LOS), MCLK cannot be derived from RCLK.
æìê
GND
Ground. Ground return for power supply VCC.
å
ìì
ìé
ìæ
TTIP0
TRING0
AO
AO
Transmit Tip and Ring - Port 0. The tip and ring pins for each port are dif-
ferential driver outputs designed to drive a 35 - 200
Ω load. Line matching
resistors and transformers can be selected to give the desired pulse height. See
Figures 13 through 15.
äìè
TGND0
Ground. Ground return for power supply TVCC0.
ìí
ìç
TVCC0
AI
+ 5 volt power supply input for the port 0 transmit driver. TVCC0 must not
vary from TVCC1 or VCC by more than ± 0.3 V.
ìë
ìå
DFM
DO
Driver Fail Monitor. This signal goes High to indicate a driver output short
in one or both ports.
ìê
ìä
RLOOP0
DI
Remote Loopback Enable - Port 0. When RLOOP = 1, the port 0 clock and
data inputs from the framer are ignored and the data received from the twisted-
pair line is transmitted back onto the line at the RCLK frequency. (LLOOP0
must be Low for RLOOP0 to occur.)
ìé
ëí
LOS0
DO
Loss of Signal - Port 0. LOS goes High when 175 consecutive spaces have
been detected. LOS returns Low when the received signal reaches a mark den-
sity of 12.5% (determined by receipt of four marks with a sliding 32-bit period
with no more than 15 consecutive zeros). Received marks are output on
RPOS/RNEG or RDATA even when LOS is High.
ìè
ìç
ëì
ëë
RTIP0
RRING0
AI
AI
Receive Tip and Ring - Port 0. RTIP and RRING comprise the receive line
interface. This input pair should be connected to the line through a center-
tapped 1:2 transformer.
ìæ
ëê
LLOOP0
DI
Local Loopback Enable - Port 0. When LLOOP is High, the RTIP/RRING
inputs from the port 0 line are disconnected and the transmit data inputs are
routed back into the receive inputs (through JA if enabled). (RLOOP0 must
be Low for LLOOP0 to occur.)
ìå
ìä
ëé
ëè
RRING1
RTIP1
AI
AI
Receive Tip and Ring - Port 1. RTIP and RRING comprise the receive line
interface. This input pair should be connected to the line through a center-
tapped 1:2 transformer.
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