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LTC2206 Datasheet(PDF) 1 Page - Linear Technology

Part # LTC2206
Description  16-Bit, 105Msps/80Msps ADCs
Download  32 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC2206 Datasheet(HTML) 1 Page - Linear Technology

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LTC2207/LTC2206
1
22076fc
16-Bit, 105Msps/80Msps
ADCs
The LTC
®2207/LTC2206 are 105Msps/80Msps, sampling
16-bit A/D converters designed for digitizing high fre-
quency, wide dynamic range signals up to input frequencies
of 700MHz. The input range of the ADC can be optimized
with the PGA front end.
The LTC2207/LTC2206 are perfect for demanding com-
munications applications, with AC performance that
includes 78.2dB Noise Floor and 100dB spurious free
dynamic range (SFDR). Ultralow jitter of 80fsRMS allows
undersampling of high input frequencies with excellent
noise performance. Maximum DC specs include
±4LSB
INL,
±1LSB DNL (no missing codes) over temperature.
A separate output power supply allows the CMOS output
swing to range from 0.5V to 3.6V.
The ENC+ and ENCinputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed with a wide range of
clock duty cycles.
Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Imaging Systems
ATE
Sample Rate: 105Msps/80Msps
78.2dBFS Noise Floor
100dB SFDR
SFDR >82dB at 250MHz (1.5VP-P Input Range)
PGA Front End (2.25VP-P or 1.5VP-P Input Range)
700MHz Full Power Bandwidth S/H
Optional Internal Dither
Optional Data Output Randomizer
Single 3.3V Supply
Power Dissipation: 900mW/725mW
Optional Clock Duty Cycle Stabilizer
Out-of-Range Indicator
Pin-Compatible Family
105Msps: LTC2207 (16-Bit), LTC2207-14 (14-Bit)
80Msps: LTC2206 (16-Bit), LTC2206-14 (14-Bit)
65Msps: LTC2205 (16-Bit), LTC2205-14 (14-Bit)
40Msps: LTC2204 (16-Bit)
25Msps: LTC2203 (16-Bit) Single-Ended Clock
10Msps: LTC2202 (16-Bit) Single-Ended Clock
48-Pin 7mm
× 7mm QFN Package
+
S/H
AMP
CORRECTION
LOGIC AND
SHIFT REGISTER
OUTPUT
DRIVERS
16-BIT
PIPELINED
ADC CORE
INTERNAL ADC
REFERENCE
GENERATOR
1.25V
COMMON MODE
BIAS VOLTAGE
CLOCK/DUTY
CYCLE
CONTROL
D15
D0
ENC+
PGA
SHDN
DITH
MODE
OE
RAND
ENC
VCM
ANALOG
INPUT
22076 TA01
0.5V TO 3.6V
3.3V
3.3V
SENSE
OGND
OVDD
2.2μF
0.1μF
0.1μF
0.1μF
0.1μF
VDD
GND
ADC CONTROL INPUTS
AIN+
AIN
OF
CLKOUT+
CLKOUT
FREQUENCY (MHz)
0
–70
–30
0
40
22076 G05
–90
–110
–80
–50
–10
–20
–40
–60
–100
–120
–130
10
20
30
50
LTC2207: 64K Point FFT,
fIN = 14.8MHz, –1dBFS,
PGA = 0, 105Msps
TYPICAL APPLICATION
DESCRIPTION
FEATURES
APPLICATIONS
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.


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