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RF2053TR13 Datasheet(PDF) 3 Page - RF Micro Devices |
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RF2053TR13 Datasheet(HTML) 3 Page - RF Micro Devices |
3 / 36 page 3 of 36 RF2053 DS140110 7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com. Note 1: The signal should be connected to this pin such that DC current cannot flow into or out of the chip, either by using AC coupling capacitors or by use of a transformer (see evaluation board schematic). Note 2: DC current needs to flow from ANA_VDD into this pin, either through an RF inductor, or transformer (see evaluation board schematic). Note 3: Alternatively an external reference can be AC-coupled to pin 11 XTALIPN, and pin 10 XTALIPP decoupled to ground. This may make PCB routing simpler. Pin Function Description 1ENBL Ensure that the ENBL high voltage level is not greater than VDD. An RC low-pass filter could be used to reduce digital noise. 2VCOINP External VCO differential input. See note 1. 3VCOINN External VCO differential input. See note 1. 4REXT External bandgap bias resistor. Connect a 51k resistor from this pin to ground to set the bandgap reference bias current. This could be a sensitive low frequency noise injection point. 5ANA_DEC Analog supply decoupling capacitor. Connect to analog supply and apply RF decoupling to a good quality ground as close to the pin as possible. 6LFILT1 Phase detector output. Low-frequency noise-sensitive node. 7NC 8NC 9MODE Mode select pin. Connect to DIG_VDD if mode switching is not required. 10 XTALIPP Reference crystal / reference oscillator input. Should be AC-coupled if an external reference is used. See note 3. 11 XTALIPN Reference crystal / reference oscillator input. Should be AC-coupled to ground if an external reference is used. See note 3. 12 GND Connect to ground. 13 NC 14 NC 15 NC 16 NC 17 NC 18 NC 19 DIG_VDD Digital supply. Should be decoupled as close to the pin as possible. 20 NC 21 NC 22 ANA_VDD Analog supply. Should be decoupled as close to the pin as possible. 23 RFIPN Differential input. See note 1. 24 RFIPP Differential input. See note 1. 25 NC 26 NC 27 RFOPN Differential output. See note 2. 28 RFOPP Differential output. See note 2. 29 RESETB Chip reset (active low). Connect to DIG_VDD if external reset is not required. 30 ENX Serial interface select (active low). An RC low-pass filter could be used to reduce digital noise. 31 SCLK Serial interface clock. An RC low-pass filter could be used to reduce digital noise. 32 SDATA Serial interface data. An RC low-pass filter could be used to reduce digital noise. EP Exposed pad Connect to ground. This is the ground reference for the circuit. All decoupling should be connected here through low impedance paths. |
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