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LTC2150-14 Datasheet(PDF) 1 Page - Linear Technology

Part # LTC2150-14
Description  14-Bit 250Msps/ 210Msps/170Msps ADCs
Download  32 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC2150-14 Datasheet(HTML) 1 Page - Linear Technology

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21521014fa
LTC2152-14/
LTC2151-14/LTC2150-14
For more information www.linear.com/LTC2152-14
TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
14-Bit 250Msps/
210Msps/170Msps ADCs
n
Communications
n
Cellular Basestations
n
Software Defined Radios
n
Medical Imaging
n
High Definition Video
n
Testing and Measurement Instruments
n
70dB SNR
n
90dB SFDR
n
Low Power: 356mW/338mW/313mW Total
n
Single 1.8V Supply
n
DDR LVDS Outputs
n
Easy-to-Drive 1.5VP-P Input Range
n
1.25GHz Full Power Bandwidth S/H
n
Optional Clock Duty Cycle Stabilizer
n
Low Power Sleep and Nap Modes
n
Serial SPI Port for Configuration
n
Pin Compatible 12-Bit Versions
n
40-Pin (6mm × 6mm) QFN Package
TheLTC®2152-14/LTC2151-14/LTC2150-14are250Msps/
210Msps/170Msps 14-bit A/D converters designed for
digitizing high frequency, wide dynamic range signals.
They are perfect for demanding communications applica-
tions with AC performance that includes 70dB SNR and
90dB spurious free dynamic range (SFDR). The 1.25GHz
input bandwidth allows the ADC to undersample high
frequencies with good performance. The latency is only
six clock cycles.
DCspecsinclude±0.85LSBINL(typ),±0.25LSBDNL(typ)
and no missing codes over temperature. The transition
noise is 1.82LSBRMS.
The digital outputs are double-data rate (DDR) LVDS.
The ENC+ and ENCinputs can be driven differentially with
asinewave,PECL,LVDS,TTL,orCMOSinputs.Anoptional
clock duty cycle stabilizer allows high performance at full
speed for a wide range of clock duty cycles.
L
, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
LTC2152-14: 32K Point FFT,
fIN = 15MHz, –1dBFS, 250Msps
S/H
CORRECTION
LOGIC
OUTPUT
DRIVERS
14-BIT
PIPELINED
ADC
CLOCK/DUTY
CYCLE
CONTROL
D12_13
D0_1
CLOCK
ANALOG
INPUT
21521014 TA01a
DDR
LVDS
VDD
OVDD
OGND
FREQUENCY (MHz)
0
–120
–100
–80
–60
–40
0
20
40
60
80
21521014 TA01b
100
120
–20


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