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M2S56D20AKT-75 Datasheet(PDF) 6 Page - Mitsubishi Electric Semiconductor |
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M2S56D20AKT-75 Datasheet(HTML) 6 Page - Mitsubishi Electric Semiconductor |
6 / 37 page 6 MITSUBISHI ELECTRIC Jul. '01 Preliminary MITSUBISHI LSIs DDR SDRAM (Rev.1.0) M2S56D20/ 30/ 40AKT 256 M Double Data Rate Synchronous DRAM COMMAND TRUTH TABLE H=High Level, L=Low Level, V=Valid, X=Don't Care, n=CLK cycle nu mber NOTE: 1. Applies only to read bursts with autoprecharge disabled; this command is undefined (and should not be used) for read bursts with autoprecharge enabled, and for write bursts. 2. BA0-BA1 select either the Base or the Extended Mode Register (BA0 = 0, BA1 = 0 selects Mode Register;BA0=1 , BA1 = 0 selects Extended Mode Register; other combinations of BA0-BA1 are reserved; A0 -A12 provide the op-code to be written to the selected Mode Register. COMMAND MNEMONIC CKE n-1 CKE n /CS /RAS /CAS /WE BA0,1 A10 /AP A0-9, 11-12 Deselect DESEL H X H X X X X X X No Operation NOP H X L H H H X X X Row Address Entry & Bank Activate ACT H H L L H H V V V Single Bank Precharge PRE H H L L H L V L X Precharge All Banks PREA H H L L H L H X Column Address Entry & Write WRITE H H L H L L V L V Column Address Entry & Write with Auto -Precharge WRITEA H H L H L L V H V Column Address Entry & Read READ H H L H L H V L V Column Address Entry & Read with Auto -Precharge READA H H L H L H V H V Auto -Refresh REFA H H L L L H X X X Self-Refresh Entry REFS H L L L L H X X X Self-Refresh Exit REFSX L H H X X X X X X L H L H H H X X X Burst Terminate TERM H H L H H L X X X Mode Register Set MRS H H L L L L L L V X note 1 2 |
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