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LTC4267-3 Datasheet(PDF) 10 Page - Linear Technology

Part # LTC4267-3
Description  Power over Ethernet IEEE 802.3af PD Interface with Integrated Switching Regulator
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4267-3 Datasheet(HTML) 10 Page - Linear Technology

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LTC4267-3
10
42673fb
For more information www.linear.com/LTC4267-3
applicaTions inForMaTion
avoid corrupting the 25k signature resistor while also sav-
ing board space and cost. In addition, the inrush current
limit requirement of the IEEE 802.3af standard can cause
largetransientpowerdissipationinthePD.TheLTC4267-3
is designed to allow multiple turn-on sequences without
overheating the miniature 16-lead package. In the event of
excessive power cycling, the LTC4267-3 provides thermal
overload protection to keep the onboard power MOSFET
within its safe operating area.
OPERATION
The LTC4267-3 PD interface has several modes of opera-
tion depending on the applied input voltage as shown in
Figure 1 and summarized in Table 1. These modes satisfy
therequirementsdefinedintheIEEE802.3afspecification.
The input voltage is applied to the VPORTN pin and must
be negative relative to the VPORTP pin. Voltages in the data
sheet for the PD interface portion of the LTC4267-3 are
with respect to VPORTP while the voltages for the switch-
ing regulator are referenced to PGND. It is assumed that
PGND is tied to POUT. Note the use of different ground
symbols throughout the data sheet.
Table 1. LTC4267-3 Operational Mode
as a Function of Input Voltage
INPUT VOLTAGE
(VPORTN with RESPECT to VPORTP) LTC4267-3 MODE OF OPERATION
0V to –1.4V
Inactive
–1.5V to –9.5V**
25k Signature Resistor Detection
–9.8V to –12.4V
Classification Load Current Ramps up
from 0% to 100%
–12.5V to UVLO*
Classification Load Current Active
UVLO* to –57V
Power Applied to Switching Regulator
*VPORTN UVLO includes hysteresis.
Rising input threshold ≅ –36.0V
Falling input threshold ≅ –30.5V
**Measured at LTC4267-3 pin. The LTC4267-3 meets the IEEE 802.3af
10V
minimum when operating with the required diode bridges.
Figure 1. Output Voltage, PWRGD and PD
Current as a Function of Input Voltage
DETECTION V1
CLASSIFICATION
UVLO
TURN-ON
UVLO
OFF
POWER
BAD
UVLO
OFF
UVLO
ON
UVLO
TURN-OFF
τ = RLOAD C1
PWRGD TRACKS
VPORTN
DETECTION V2
–10
TIME
–20
–30
–40
–50
–10
TIME
–20
–30
–40
–50
–10
TIME
–20
–30
–40
–50
ICLASS
ILIM_LO
dV
dt
ILIM_LO
C1
=
POWER
BAD
POWER
GOOD
DETECTION I1
CLASSIFICATION
ICLASS
DETECTION I2
LOAD, ILOAD (UP TO ILIM_HI)
CURRENT
LIMIT, ILIM_LO
42673 F01
ICLASS DEPENDENT ON RCLASS SELECTION
ILIM_LO = 140mA (NOMINAL), ILIM_HI = 375mA (NOMINAL)
I1 = V1 – 2 DIODE DROPS
25k
ILOAD =
(UP TO ILIM_HI)
VOUT
RLOAD
I2 = V2 – 2 DIODE DROPS
25k
VPORTP
PSE
IIN
LTC4267-3
R9
RCLASS
RLOAD
VOUT
C1
RCLASS
PWRGD
POUT
PGND
VPORTN
VIN
TIME
VOLTAGES WITH RESPECT TO VPORTP


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