 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
LT8490 Datasheet(PDF) 8 Page - Linear Technology |
|
||||||||||||||||||||||||||||||
LT8490 Datasheet(HTML) 8 Page - Linear Technology |
|
|
8 / 42 page  LT8490 8 8490f For more information www.linear.com/LT8490 pin FuncTions FBIR (Pin 1): A/D Input Pin. Connects to FBIN pin to measure input feedback voltage. FAULT (Pin 2): FAULT Pin. This pin generates an active high digital output that, when used with an LED, provides a visual indication of a fault event. TEMPSENSE(Pin3):A/DInputPin.Connectstoathermis- tor divider network for sensing battery temperature or a resistor divider if unused. This pin is frequently monitored for temperature compensation and enforcing temperature limits. VDD (Pin 4): Control Logic Power Supply Pin. Connect this pin to LDO33 and AVDD. FBOW(Pin5):PWMDigitalOutputPin.ConnectstoFBOUT through an RCR network to temperature compensate the battery voltage. FBIW (Pin 6): PWM Digital Output Pin. Connects to FBIN through an RCR network to adjust the solar panel volt- age for MPPT. INTVCC (Pin 7): Internal 6.35V Regulator Output Pin. Con- nects to the GATEVCCpin.INTVCCispoweredfromEXTVCC when the EXTVCC voltage is higher than 6.4V, otherwise INTVCC is powered from VIN. Bypass this pin to ground with a minimum 4.7µF ceramic capacitor. See Switching Configuration - MODE Pin for additional details. SWEN (Pin 8): Switch Enable Pin. Tie to the SWENO pin. MODE (Pin 9): Mode Pin. The voltage applied to this pin setstheoperatingmodeoftheswitchingregulator.Tiethis pin to INTVCC to make discontinuous current mode active. Tie this pin to ground to operate in discontinuous current mode for low battery charging currents and continuous current mode for high battery charging currents. Do not float this pin. See Switching Configuration - MODE Pin for additional details. IMON_IN (Pin 10): Input Current Monitor Pin. The current out of this pin is proportional to the input current. See the Applications Information section for more information. SHDN (Pin 11): Shutdown Pin. In conjunction with the UVLO (undervoltage lockout) circuit, this pin is used to enable/disable the chip. Do not float this pin. CSN (Pin 12): The (–) Input to the Inductor Current Sense and Reverse Current Detect Amplifier. CSP (Pin 13): The (+) Input to the Inductor Current Sense and Reverse Current Detect Amplifier. The VC pin voltage and built-in offsets between the CSP and CSN pins set the current trip threshold. LDO33 (Pin 14): 3.3V Regulator Output. This supply provides power to the VDD and AVDD pins. Bypass this pin to ground with a minimum 4.7µF ceramic capacitor. FBIN (Pin 15): Input Feedback Pin. This pin is connected to the input error amplifier input. FBOUT (Pin 16): Output Feedback Pin. This pin connects the error amplifier input to an external resistor divider from the output. IMON_OUT (Pin 17): Output Current Monitor Pin. The current out of this pin is proportional to the average out- put current. See the Applications Information section for more information. VC (Pin 18): Error Amplifier Output Pin. Tie the external compensation network to this pin. SS (Pin 19): Soft-Start Pin. Place 100nF of capacitance from this pin to ground. Upon start-up, this pin will be charged by an internal resistor to 2.5V. CLKOUT (Pin 20): Switching Regulator Clock Output Pin. CLKOUT will toggle at the same frequency as the switch- ing regulator oscillator (OSC1 on the Block Diagram) or as the SYNC pin, but is approximately 180° out-of-phase. CLKOUT can also be used as a temperature monitor of the switching regulator since the CLKOUT duty cycle varies linearly with the junction temperature of the switching regulator. It is connected to CLKDET through an RC filter. The CLKOUT pin can drive capacitive loads up to 200pF. SYNC (Pin 21): To synchronize the switching frequency to an outside clock, simply drive this pin with a clock. The high voltage level of the clock needs to exceed 1.3V, and the low level should be less than 0.5V. Drive this pin to less than 0.5V to revert to the internal free-running clock (OSC1 in the Block Diagram). |
Similar Part No. - LT8490_15 |
|
Similar Description - LT8490_15 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
