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LTC2000A Datasheet(PDF) 8 Page - Linear Technology |
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LTC2000A Datasheet(HTML) 8 Page - Linear Technology |
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8 / 52 page  LTC2000A 8 2000af For more information www.linear.com/LTC2000A The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. AVDD18, DVDD18 = 1.8V to 1.92V, AVDD33, DVDD33 = 3.135V to 3.465V, SVDD = 1.71V to 3.465V, RFSADJ = 500Ω, output load 50Ω double terminated, unless otherwise specified. timing characteristics SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS t1 SDI Valid to SCK Setup (Note 3) l 4 ns t2 SDI Valid to SCK Hold (Note 3) l 4 ns t3 SCK High Time (Note 3) l 9 ns t4 SCK Low Time (Note 3) l 9 ns t5 CS Pulse Width (Note 3) l 10 ns t6 SCK High to CS High (Note 3) l 7 ns t7 CS Low to SCK High (Note 3) l 7 ns t10 CS High to SCK High (Note 3) l 7 ns t13 SCK Low to SDO Valid Unloaded (Note 3) l 10 ns SCK Frequency 50% Duty Cycle (Note 3) l 50 MHz t11 LVDS DAP/N, DBP/N to DCKI Setup Time (Note 3) DCKI_Q = 1 DCKI_Q = 0, DCKI_TADJ = 000 l l 200 570 ps ps t12 LVDS DAP/N, DBP/N to DCKI Hold Time (Note 3) DCKI_Q = 1 DCKI_Q = 0, DCKI_TADJ = 000 l l 200 –170 ps ps Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All voltages are with respect to GND. Note 3: Guaranteed by design and not production tested. Note 4: Digital inputs at 0V or SVDD. Note 5: Latency is the delay from a transition on DCKIP/N until the CKP/N transition which causes the sample on DAP/N or DBP/N to appear at the DAC output IOUTP/N, as measured in DAC sample clock (CKP/N) cycles. |
Similar Part No. - LTC2000A_15 |
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Similar Description - LTC2000A_15 |
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